Simulation of thermal transport at sub-Kelvin

Thermal management in quantum computers is an urgent and crucial task. As the number of qubits rapidly scales, more electric circuits are placed close to qubits to operate them. Joule-heating of these circuits could significantly warm the qubit device, degrading its fidelity. With intensive activity in quantum computing at Grenoble, we (CEA-LETI, Grenoble, France) are looking for an enthusiastic post-doc researcher to study thermal transport at cryogenic temperature (sub-Kelvin).
The post-doc will apply the finite-element non-equilibrium Green’s function [1], developed in the group of Natalio Mingo at CEA-Grenoble, to simulate phonon transport in various designed structures. The simulation result promotes comparison with on-going experiments and constructive discussions in order to optimize the thermal management.

[1] C. A. Polanco, A. van Roekeghem, B. Brisuda, L. Saminadayar, O. Bourgeois, and N. Mingo, Science Advances 9, 7439 (2023).

Modeling of charge noise in spin qubits

Thanks to strong partnerships between several research institutes, Grenoble is a pioneer in the development of future technologies based on spin qubits using manufacturing processes identical to those used in the silicon microelectronics industry. The spin of a qubit is often manipulated with alternating electrical (AC) signals through various spin-orbit coupling (SOC) mechanisms that couple it to electric fields. This also makes it sensitive to fluctuations in the qubit's electrical environment, which can lead to large qubit-to-qubit variability and charge noise. The charge noise in the spin qubit devices potentially comes from charging/discharging events within amorphous and defective materials (SiO2, Si3N4, etc.) and device interfaces. The objective of this postdoc is to improve the understanding of charge noise in spin qubit devices through simulations at different scales. This research work will be carried out using an ab initio type method and also through the use of the TB_Sim code, developed within the CEA-IRIG institute. This last one is able of describing very realistic qubit structures using strong atomic and multi-band k.p binding models.

Design and fabrication of the magnetic control of 1.000 qubits arrays

Quantum computing is nowadays a strong field of research at CEA-LETI and in numerous institutes and companies around the world. In particular, RF magnetic fields allow to control the spin of silicon qubits, and pathway for large scale control is a real technological challenge.
The bibliographic analysis and the studies already carried out will able to draw out the pros and cons of the various existing solutions. In collaboration with integration, simulation and design staff, a proof of concept will be develloped and fabricated.

Development of large area substrates for power electronics

Improving the performance of power electronics components is a major challenge for reducing our energy consumption. Diamond appears as the ultimate candidate for power electronics. However, the small dimensions and the price of the substrates are obstacles to the use of this material. The main objective of the work is to overcome these two difficulties by slicing the samples into thin layers by SmartCut™ and by tiling these thin layers to obtain substrates compatible with microelectronics.
For this, various experiments will be carried out in a clean room. Firstly, the SmartCut™ process must be made more reliable. Characterizations such as optical microscopy, AFM, SEM, Raman, XPS, electrical, etc. will be carried out in order to better understand the mechanisms involved in this process.
The candidate might be required to work on other wide-gap materials studied in the laboratory such as GaN and SiC, which will allow him to have a broader view of substrates for power electronics.

Design of 2D Matrix For Silicum Quantum computing with Validation by Simulation

The objective is to design a 2D matrix structure for quantum computing on silicon in order to consider structures of several hundred physical Qubits.

In particular the subject will be focused on:
- The functionality of the structure (Coulomb interaction, RF and quantum)
- Manufacturing constraints (simulation and realistic process constraint)
- The variability of the components (Taking into account the variability parameter and realistic defectivity)
- The constraints induced on the algorithms (error correction code)
- Scalability of the structure to thousands of physical Qubits

The candidate will work within a project of more than fifty people with expertise covering the design, fabrication, characterization and modeling of spin qubits as well as related disciplines (cryoelectronics, quantum algorithms, quantum error correction, …)

Effect of TSV presence on BEOL reliability for 3-layer stacked CMOS image sensor (CIS)

Because conventional downsizing based on the empirical Moore's law has reached its limitations, an alternative integration technology, such as three-dimensional integration (3DI) is becoming the mainstream. The 3rd generation of CMOS image sensor (CIS) stacks up to 3 die interconnected by hybrid bonding and High Density Through Silicon Vias (HD-TSVs). Devices and circuits good functioning and integrity have to be maintained in such an integration especially in the close neighborhood of TSVs. Thermal budget, copper pumping, thin wafer warpage can lead to electrical yield and reliability concerns and must be investigated.
The work consists in evaluating the impact of TSV processing and proximity on BEOL and FEOL performance and reliability. Acquired data sets will help to define design rules and in particular a potential Keep-Out Zone (KOZ) and calibrate a finite element model (FFM).

Optomechanical force probes development for high speed AFM

The proposed topic is part of a CARNOT project aiming at developing a new generation of force sensors based on optomechanical transduction. These force sensors will be implemented in ultrafast AFM microscopes for imaging and force spectroscopy. They will allow to address biological and biomedical applications on sub-microsecond or even nanosecond time scales in force spectroscopy mode.
First optomechanical VLSI force probes on silicon have been designed and fabricated in LETI's industrial grade clean rooms and have led to first proofs of concept for fast AFM [1,2]. The post-doctoral student will be in charge of the preparation of force probes in order to integrate them in a high speed AFM developed by our partner at CNRS LAAS (Toulouse). He will be in charge of the back end operations, from the release of the structures, their observation (SEM, optical microscopies, etc.), to the optical packaging with fiber optic ferrules. He will also participate in the development of a test bench for components before and after packaging to select devices and validate the packaged probes before integration into an AFM.
The post-doctoral student will also investigate the operation of the probe in a liquid medium to allow later AFM studies of biological phenomena: for this, the development of efficient actuation means (electrostatic, thermal or optical) of the mechanical structure will be carried out and applied experimentally. A feedback on the modeling and the design is expected from the measurements, in order to ensure the understanding of the observed physical phenomena. Finally, the post-doctoral fellow will have the possibility to propose new device designs to target the expected performances. The devices will be fabricated in Leti's clean room, then tested and compared to the expected performances.

Multi-scale modeling of the electromagnetic quantum dot environment

In the near future, emerging quantum information technologies are expected to lead to global breakthroughs in high performance computing and secure communication. Among semiconductor approaches, silicon-based spin quantum bits (qubits) are promising thanks to their compactness featuring long coherence time, high fidelity and fast qubit rotation [Maurand2016], [Meunier2019]. A main challenge is now to achieve individual qubit control inside qubit arrays.

Qubit array constitutes a compact open system, where each qubit cannot be considered as isolated since it depends on the neighboring qubit placement, their interconnection network and the back-end-line stack. The main goal of this post-doctoral position is to develop various implementation of spin control on 2D qubit array using multi-scale electromagnetic (EM) simulation ranging from nanometric single qubit up to millimetric interconnect network.

The candidate will i) characterize radio-frequency (RF) test structures at cryogenic temperature using state-of-the-art equipment and compare results with dedicated EM simulations, ii) evaluate the efficiency of spin control and allow multi-scale optimization from single to qubit arrays [Niquet2020], iii) integrate RF spin microwave control for 2D qubit array using CEA-LETI silicon technologies.

The candidate need to have a good RF and microelectronic background and experience in EM simulation, and/or design of RF test structures and RF characterization. This work takes place in a dynamic tripartite collaborative project between CEA-LETI, CEA-IRIG and CNRS-Institut Néel (ERC “Qucube”).

Hybrid CMOS / spintronic circuits for Ising machines

The proposed research project is related to the search for hardware accelerators for solving NP-hard optimization problems. Such problems, for which finding exact solutions in polynomial time is out of reach for deterministic Turing machines, find many applications in diverse fields such as logistic operations, circuit design, medical diagnosis, Smart Grid management etc.
One approach in particular is derived from the Ising model, and is based on the evolution (and convergence) of a set of binary states within an artificial neural network (ANN).In order to improve the convergence speed and accuracy, the network elements may benefit from an intrinsic and adjustable source of fluctuations. Recent proof-of-concept work highlights the interest of implementing such neurons with stochastic magnetic tunnel junctions (MTJ).

The main goals will be the simulation, dimensioning and fabrication of hybrid CMOS/MTJ elements. The test vehicles will then be characterized in order to validate their functionality.

This work will be carried out in the frame of a scientific collaboration between CEA-Leti and Spintec.

Modeling of trapping and vertical leakage effects in GaN epitaxial substrates on Si

State of the art: Understanding and modeling vertical leakage currents and trapping effects in GaN substrates on Si are among the crucial subjects of studies aimed at improving the properties of GaN power components : current collapse and Vth instabilities reductions, reduction of the leakage current in the OFF state.
Many universities [Longobardi et al. ISPSD 2017 / Uren et al. IEEE TED 2018 / Lu et al. IEEE TED 2018] and industrials [Moens et al. ISPSD 2017] are trying to model vertical leakages but until now, no clear mechanism has emerged from this work to model them correctly over the entire range of voltage and temperatures targeted. In addition, modeling the effects of traps in the epitaxy is necessary for the establishment of a a robust and predictive TCAD model of device.
For LETI, the strategic interest of such a work is twofold: 1) Understanding and reducing the effects of traps in the epitaxy impacting the functioning of GaN devices on Si (current collapse, Vth instabilities…) 2) Reaching the leakage specifications @ 650V necessary for industrial applications.
The candidate will have to take charge in parallel of the electrical characterizations and the development of TCAD models:
A) Advanced electrical characterizations (I (V), I (t), substrate ramping, C (V)) as a function of temperature and illumination on epitaxial substrates or directly on finite components (HEMT, Diodes, TLM )
B) Establishment of a robust TCAD model integrating the different layers of the epitaxy in order to understand the effects of device instabilities (dynamic Vth, dynamic Ron, BTI)
C) Modeling of vertical conduction in epitaxy with the aim of reducing leakage currents at 650V
Finally, the candidate must be proactive in improving the different parts of the substrate

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