Epitaxial layer on GaAs or Ge transfer to sapphire or silicate for gravitational waves mirror realization

Gravitational waves were predicted by the theory of general relativity, they are created in the universe by extreme cosmic events. Their measurement on earth in large instruments such as VIRGO in Italy is a challenge in terms of measurement sensitivity. These instruments are large interferometers (several kilometers), and the entire optical chain must minimize noise to be sensitive to very small modifications in space-time. Mirrors are one of the key elements of the optical chain.
In this thesis, we propose to create a new type of mirror making it possible to significantly improve the sensitivity of an interferometer. This mirror is based on a sequence of thin epitaxial layers with variations in optical index between each of them. These thin layers must be on a silica or sapphire base. Such a structure is not achievable by additive manufacturing (ie by depositing the layers on the sapphire or silica substrate), because the thin layers are monocrystalline, and the silica is amorphous when the sapphire has an unsuitable lattice parameter. Only thin layer transfer techniques allow the creation of such a stack.
This thesis will study thin layer transfer technologies to study one or more options permitting the transfer of monocrystalline layers from the donor substrate to the receiver substrate. Each of the necessary steps will be studied, and mechanisms will be proposed to explain the experimental observations. Demonstrators will be produced and their optical performances evaluated to determine if they are in line with the required sensitivity.

Electronic structure calculation with deep learning models

Ab initio simulations with Density Functional Theory (DFT) are now routinely employed across scientific disciplines to unravel the intricate electronic characteristics and properties of materials at the atomic level. Over the past decade, deep learning has revolutionized multiple areas such as computer vision, natural language processing, healthcare diagnostics, and autonomous systems. The combination of these two fields presents a promising avenue to enhance the accuracy and efficiency of complex materials properties predictions, bridging the gap between quantum-level understanding and data-driven insights for accelerated scientific discovery and innovation. Many efforts have been devoted to build deep learning interatomic potentials that learn the potential energy surface (PES) from DFT simulations and can be employed in large-scale molecular dynamics (MD) simulations. Generalizing such deep learning approaches to predict the electronic structure instead of just the energy, forces and stress tensor of a system is an appealing idea as it would open up new frontiers in materials research, enabling the simulation of electron-related physical properties in large systems that are important for microelectronic applications. The goal of this PhD is to develop new methodologies relying on equivariant neural networks to predict the DFT Hamiltonian (i.e. the most fundamental property) of complex materials (including disorder, defects, interfaces, etc.) or heterostructures.

Qubit conditioning circuit based on Single Electron Transistor electronics

A new research direction has emerged that consists in the design of cryogenics integrated circuits (cryo-CMOS) to address the needs of many scientific experiments in astronomy, in physics of particles or in quantum physics. Nevertheless, the power consumption of such solutions is still high and prevent their use in applications that necessitate the conditioning of large number of devices.
The proposed PhD position intends to explore an alternative path by using Single Electron Transistor (SET) ifor the design of ultra-low noise, ultra-low power consumption conditioning electronics. Indeed, SETs have quantized behaviour at cryogenics temperature that could help in reaching noise and power consumption optimum. As applied case, this thesis aims at providing a conditioning electronics dedicated to silicon qubit in the frame of quantum computing project.
The applicant should have very good knowledge of both semiconductor and quantum physics. Good understanding of analog electronics and signal processing is required as well. The applicant should be creative and should have a strong taste for experiments. Last, the applicant should have good modelling skills and a good knowledge of associated computing language (Pyhton)

MEMS chaotic motion for high sensitivity

Improving the resolution of MEMS sensors always means increasing the cost of the component (surface area) or his electronics (complexity and power consumption). In view of the current challenges of energy sobriety, it is essential to explore new disruptive ways to reduce the impact of high-performance sensors.
Chaos is a deterministic phenomenon exponentially sensitive to small variations. Little studied until recently, it can be simply implemented in the dynamics of MEMS sensors, to amplify weak signals and increase resolution.
Ultimately, this is an "in-sensor computing" method, making it possible to do away with some of the measurement electronics.
The aim of this thesis is to create the first MEMS demonstrator for in-sensor computing in the chaotic regime. To achieve this, we propose to study, through in-depth characterization/modeling work, this new operating regime on MEMS sensors already available at DCOS/LICA (M&NEMS and MUT beams). These first steps in understanding the link between measurand and MEMS response in the chaotic regime will enable us to move on to other applications, notably in the field of cryptography.

Electrical characteization and Reliability of NextGeN FDSOI MOSFETs

Global demand on semiconductor solutions (device, circuit, system) has skyrocketed during the last few years, especially in reliation with COVID worldwide crisis. This industry has revealed its significance in the present world has well as its weaknesses. The European council decided to launch an ambisious program called 'Chip Act' to develop a solid semiconductor european industries network based on its champions such as ST microelectronics, SOITEC and the CEA-LETI. In France, the french government decided to push forward the FDSOI technology using the CEA-LETI to develop the 10nm node and beyond.
The reach the MOSFET expected performance of such an aggressive node, several original technological solutions are considered, such as the use of Si-channel stressors to boost the mobility and the ON state current or the use of thinned Si channel film and gate oxide. The influence of these novel processes and technological bricks on MOSFET FoM and reliability must be carefully studied before entering in a production mode. The PhD student will address the electrical characterization of the High-k/Metal Gate stacks (initial performance) and their long term reliability (aging under stress). Electrical modeling of the experimental data will be used to determine the crucial parameters to improve and give quick feedback to the Device development Lab.

Quantum device integration on Ge/SiGe heterostructures

Spin qubits in semiconductors quantum dots offer a fast scaling perspective of quantum processors by leveraging the manufacturing techniques of the microelectronics industry. To explore this approach, industrial research teams implemented qubits directly on their existing routes (e.g. FDSOI at CEA-Leti or FinFET at Intel). However, these devices suffer from an important electrostatic disorder stemming from the presence of an Si/SiO2 interface next to the qubits.
An alternative way consists in using semiconductor heterostructures based on Ge/SiGe stacks. They allow the charge confinement between crystalline interfaces, thus drastically reducing the electrostatic disorder. Besides the low effective mass of carriers in Ge allows more relaxed dimensions, while the spin-orbit coupling of holes in Ge allows spin manipulations without integration of any external control element.
The PhD thesis aims at developing a Ge/SiGe-based platform at CEA-Leti. The work will consist in fabricating test structures such as Hall bars on different substrate coupons, perform low temperature characterization and provide feedback to help optimizing the substrates quality. In parallel a 200mm route based on eBeam lithography will be set up for the fabrication of one- and two-dimensional arrays of quantum dots.