In situ study of the impact of the electric field on the properties of chalcogenide materials
Chalcogenide materials (PCM, OTS, NL, TE, FESO, etc.) are the basis of the most innovative concepts in microelectronics, from PCM memories to the new neuromorphic and spinorbitronic devices (FESO, SOT-RAM, etc.). Part of their operation relies on out-of-equilibrium physics induced by the electronic excitation resulting from the application of an intense electric field. The aim of this thesis is to measure experimentally on chalcogenide thin films the effects induced by the intense electric field on the atomic structure and electronic properties of the material with femtosecond (fs) time resolution. The 'in-operando' conditions of the devices will be reproduced using a THz fs pulse to generate electric fields of the order of a few MV/cm. The induced changes will then be probed using various in situ diagnostic methods (optical spectroscopy or x-ray diffraction and/or ARPES). The results will be compared with ab initio simulations using a state-of-the-art method developed with the University of Liège. Ultimately, the ability to predict the response of different chalcogenide alloys on time scales fs under extreme field conditions will make it possible to optimise the composition and performance of the materials (e- switch effect, electromigration of species under field conditions, etc.), while providing an understanding of the underlying fundamental mechanisms linking electronic excitation, evolution and the properties of the chalcogenide alloys.
In-depth electrical and material characterization of low-K spacer
As part of the European Chip Act, CEA-Leti is pioneering a new generation of transistors using FDSOI architecture. Our goal is to deliver advanced performance with a strong emphasis on materials and energy efficiency. As we push the limits of planar transistors at 10 nm and 7 nm, we face significant physical challenges, particularly in reducing parasitic elements like capacitance and access resistance, which are critical for minimizing energy loss and optimizing performance. We are eager to tackle these challenges together.
We are excited to offer a unique PhD opportunity for motivated students interested in the field of semiconductor device engineering. Join our team to work on the incorporation and characterization of low-k spacer for advanced 7-10nm FDSOI Technology. This PhD offers the chance to work on a groundbreaking project. If you're curious, innovative, and eager for a challenge, this opportunity is perfect for you!
The impact of the dielectric spacer nature has relevant effects on the overall transistor performances, specifically in non-fully overlapped configuration. The dielectric spacer integration, optimization and engineering remains a challenge and becomes crucial to address technology advancement and scaling down demand. Numerous spacer candidates (SiN, SiCO, SiCON, SiCBN) have been introduced and identified as promising solutions, however, they frequently suffer from inherent defects and adverse electrical characteristics, such as charge trapping and presence of undesired interface states, which hinder their and the overall transistors performance.
Within this framework, the objective of this PhD is to conduct a comprehensive investigation and electrical characterization (CV,IV, BTI, HCI…) of the material spacer (interface, volume), providing an in-depth analysis of transistor performance and its underlying mechanisms. Innovative ultrafast CV stress-measurement characterization on dielectric samples will be also carried out and the correlation between trapping performance and the deposition parameters used in their fabrication will be established. Additionally, the candidate will collaborate closely with experts to contribute to the thin film deposition and characterization of new materials through surface analyses and thin-film characterizations (ellipsometry, FTIR, XRR, XPS…)
Throughout this journey, you will gain a broad spectrum of knowledge, spanning microelectronics materials and processes, analog integrated design, all while addressing the unique challenge of advance 7-10 nm FDSOI technology. You'll collaborate with multidisciplinary teams to develop a deep understanding of FDSOI devices and analyze existing and new measurements. You'll also be part of an integrated multidisciplinary lab, working alongside a team composed of several permanent researchers, exploring a wide range of research applications.
Towards a low-resistive base contact for the InP-HBT transistor
Join CEA LETI for an exciting technological journey! Immerse yourself in the world of III V
based transistors integrated on compatible CMOS circuits for 6 G future communications
This thesis offers the chance to work on a ambitious project, with potential to continue into
a thesis If you're curious, innovative, and eager for a challenge, this opportunity is perfect
for you!
As the consumption of digital content continues to grow, we can foresee that 6 G
communication systems will have to find more capacity to support the increase in traffic
New Sub THz frequencies based systems are a huge opportunity to increase data rate but
are very challenging to build and maturate the power amplifier required to transmit a
signal will have to offer sufficient power and energy efficiency which is not obtained with
actual silicon technology InP based HBTs (Heterojunction Bipolar Transistors) developed
on large Silicon substrates have the potential to meet the requirements and be integrated
as close as possible to the CMOS circuits to enable minimal system/interconnect losses
Sb based semiconductors for GaAsSb HBT are emerging as highly promising materials,
especially for its electrical properties to integrate the Base layer of the Transistor It is
therefore necessary to produce high performance electrical contacts on this type of
semiconductor while remaining compatible with the manufacturing processes of the Si Fab
technology platforms
Throughout
this thesis, you will gain a broad spectrum of knowledge, beneficiate from the
rich technical environment of the 300 200 mm clean room and the nano characterization
platform You will collaborate with multidisciplinary teams to develop a deep understanding
of the ohmic contacts and analyse existing measurements Several apsects of the metal
(Ni or Ti p GaAs 1 x Sb x contact will be investigated
•Identify wet and plasma solutions allowing the GaAsSb native oxide removing without
damaging the surface with XPS and AFM
•Characterize GaAs 1 x Sb x epitaxy doping level (Hall effect, SIMS, TEM)
•Understand the phase sequence during annealing between the semiconductor and the
metal with XRD and Tof SIMS Manage this intermetallic alloys formation to not
deteriorate the contact interface (TEM image associated)
•Evaluate electrical contact properties using TLM structures Measurement of the
specific contact resistivity, sheet resistance of the semiconductor ant transfer length
associated The student will be a motive force to perform electrical tests on an automatic prober
Study of 3D pattern etch mechanisms into inorganic layers for optoelectronic applications
Optoelectronic devices such as CMOS Image Sensors (CIS) require the realization of 3D structures, convex microlenses, in order to focus photons towards the photodiodes defining the pixels. These optical elements are mandatory for the device efficiency. Their shape and dimension are critical for device performances. In the same way, devices based on diffractive optic and hyperspectral sensors are looking for complex multi-height structures. Finally, recent micro-display technologies for augmented reality (AR) and virtual reality (VR) require 3D structures difficult to achieve with conventional micro-fabrication technics.
Leti is at the state of the art on an alternative photolithography technics, so-called Grayscale. This process can produce a whole range of 3D structures not available with standard photolithography, such as concave, elliptic, pyramids and asymmetrical shapes. These structures could be used in a large number of application fields, like photonics and micro-displays (AR/VR). Once these structures achieved in photoresist, it is necessary to transfer them in an adapted functional layer using plasma etching. The etch mechanisms behind the transfer of micrometric 3D patterns into a polymer layer have been recently studied at Leti. To address new application needs, it is interesting to transfer these structures into silicon based inorganic layers because of their optical properties. Furthermore, the 3D pattern dimensions, currently few micrometers, need to be sub-micrometric for the most advanced technologies. In these condition, pattern transfer fidelity of 3D structures is even more challenging and it underlines why the etch mechanisms need to be well understood.
Currently the transfer into inorganic layers by plasma etching of submicronic 3D patterns obtained with Grayscale photolithography is not well studied in literature. Consequently, this thematic is innovative and has a real benefit. The goal of this PhD thesis is to study and understand the etch mechanisms in order to control the shape and dimension of the transferred structures. The work will be very experimental and will be mainly performed in Leti’s 300mm cleanroom. You will have access to a last generation plasma etch tool and numerous characterization technics. This thesis is in collaboration with the photolithography department and in interaction with different teams, such as the silicon platform and application department.
Development of algorithms and modeling tools of Low-Energy Critical Dimension Small Angle X-ray Scattering
This PhD will take place at the CEA–LETI, a major European actor in the semiconductor industry, and more precisely, at the Nanocharacterization platform of the CEA–LETI witch offer world-class analytical techniques and state-of-the-art instruments. Our team aims to accompany the industry in the development of new characterization tools and so to meet the metrological needs of future technological nodes. Over the past few years, pioneer developments on a new metrology technique based on hard x-ray scattering called CD-SAXS were done at the PFNC. This technique is used to reconstruct the in-plane and out-of-plane structure of nanostructured thin-films with a sub-nm resolution. In this project, we are looking to extend the CD-SAXS approach leveraging the recent breakthrough in the development of low-energy x-ray sources (A. Lhuillier et al. 1988, Nobel prize 2023) called High Harmonics Generation (HHG) sources. Therefore, you will participate in the development of a new and promising characterization methods called Low-energy critical dimension small angle x-ray scattering. The very first proof of concept of this new measurement was conducted in November 2023.
Mission:
In order to include in the data reduction the measurement specificities of this new approach (multi-wavelength, low energy, …) your mission will focus on several aspects to explore in parallel:
- Develop new modeling tools to analyze the data:
o Finite element simulations with Maxwell solver
o Analytical Fourier Transform (similar to standard CD-SAXS) vs dynamical theory
o Comparison between the two approaches
- Build new models dedicated to lithography problematic (CD, overlay, roughness)
- Define the limitations of the technique through the simulation (in term of resolution (nm), uncertainty)
This work will support the development of CD-SAXS measurements with a laboratory HHG (High Harmonic Generation) source lead by a Postdoctoral fellow.
Thermomechanical study of heterostructures according to bonding conditions
For many industrial applications, the assembly of several structures is one of the key stages in the manufacturing process. However, these steps are generally difficult to carry out, as they lead to significant increases in warpage. Controlling stresses and strains generated by heterostructures is however imperative. We proposes to address this subject using both experimental exploration and simulation through thermomechanical studies in order to predict and anticipate problems due to high deformations.
Optimisation of advanced mask design for sub-micrometer 3D lithography
With the advancement of opto-electronic technology, 3D patterns with sub micrometer dimensions are more and more integrated in the device, especially on imaging and AR/VR systems. To fabricate such 3D structures using standard lithography technique requires numerous process steps: multiple lithography and pattern transfer, which is time and resource consuming.
With optical grayscale lithography, such 3D structures can be fabricated in single lithography step, therefore reducing significantly the number of process steps required in standard lithography. For high volume manufacturing of such 3D patterns, optical grayscale lithography with Deep-UV (DUV), 248nm and 193nm are the most relevant, as it is compatible with industrial production line. This technique of 3D lithography is however more complex than it seems, which requires advance lithography model and data-preparation flow to design optical mask corresponding to the desired 3D pattern.
Low temperature selective epitaxial growth of SiGe(:B) for pMOS FD-SOI transistors
As silicon technologies for microelectronics continue to evolve, processes involved in device manufacturing need to be optimized. More specifically, epitaxy, a crystal growth technique, is being used to fabricate 10 nm technological node FD-SOI (Fully Depleted-Silicon On Insulator) transistors as part of CEA-Leti's NextGen project. Doped and undoped Si and SiGe semiconductor epitaxy is being developed to improve the devices' electrical performances. The thesis will focus on selective SiGe(:B) epitaxy for channels and source/drains of pMOS transistors. A comparison of SiGe and SiGe:B growth kinetics will be made between growth under H2, the commonly used carrier gas, and N2. Innovative cyclic deposition/etching (CDE) strategies will also be evaluated, with the aim of lowering process temperatures.
Advanced Surface Analysis of Ferroelectrics for memory applications
CEA-Leti has a robust track record in memory technology. This PhD project aims to contribute to the development of HfO2-based ferroelectric devices. One of the major challenges in this field is to stabilize the orthorhombic phase while reducing film thickness and thermal budget. To gain a deeper understanding of the underlying mechanisms, a novel sample preparation method will be adapted from a previous PhD project and further developed for application to ferroelectric memories. This method involves creating a beveled crater that exposes the entire thickness of the film, allowing for access by multiple characterization techniques (XPS, TOF-SIMS, SPM) on the same area. This approach will enable the correlation of compositional and chemical measurements with electrical properties. Furthermore, heating and biasing within advanced surface characterization instruments (TOF-SIMS, XPS) will provide insights into how device performance is influenced by compositional and chemical changes.
You possess strong experimental skills and a keen interest in state-of-the-art surface analysis instruments. You excel in team environments and will have the opportunity to collaborate with experts across a wide range of techniques on the nanocharacterization platform, including advanced numerical data treatment. Proficiency in Python or similar programming languages is highly desirable.
ALD materials for FE and AFE capacitances
Ultrathin HfO2-based materials are regarded as promising candidates for embedded non-volatile memory (eNVM) and logic devices. The CEA-LETI has a leadership position in the field of BEOL-FeRAM memories ultra-low consumption (<100fj/bit) at low voltage (<1V). In this context, the developments expected in this thesis aim to evaluate the impact of HfO2-based ferroelectric FE and antiferroelectric AFE layers (10 to 4 nm fabricated by Atomic Layer Deposition ALD) on the FeRAM properties and performances.
In particular, the subject will permit a deep understanding of the crystallographic phases governing the FE/AFE properties using advanced measurements techniques offered by the CEA-LETI nano-characterization platform (physico-chemical, structural and microscopy analysis, electrical measurements). Several integration solutions for ferroelectric capacitances FeCAPs using ALD FE/AFE layers will be studied including doping, interface layers, sequential fabrication w/wo air break…
Thus, the developments based on FeCAPs stack fabricated using 300mm ALD deposition tool aspires to explore the following items:
1-Doping incorporation in FE/AFE layers (La, Y…)
2-Engineering of the interface between FE/AFE layers and top/bottom electrode
3-Plasma in-situ treatment of bottom electrode surface
4-Sequential deposition with and without air break
[1] S. Martin et al. – IEDM 2024
[2] Appl. Phys. Lett. 124, 243508 (2024)