Enhanced thermal resistor nanomaterials development, based on amorphous-Si, for microbolometers
The aim of this thesis is to develop high-performance materials for the next generation of microbolometers, with a particular focus on increasing the thermal resistance of the supporting arms to enable smaller pixel pitches. Our approach aims to take advantage of the lower thermal conductivity of materials induced by controlled inhomogeneities at the nanoscale. For this purpose, we have already demonstrated the fabrication of nanocrystallized amorphous silicon (nc-aSi) thin films (few tens of nanometers thick) with promising thermal conductivity.
In the case of nc-aSi, a range of characterization techniques—including Raman spectroscopy, X-ray diffraction, transmission electron microscopy (TEM), and the 3? method for thermal conductivity measurements—will be employed to correlate deposition conditions, nanostructure and thermal transport properties, in order to identify strategies for reducing its thermal conductivity.
The knowledge gained from studying nc-aSi could be extended to other materials.
Ideally, combining thermal measurement analysis with theoretical conduction models will provide insight into the mechanisms of heat propagation in these nanocrystallized materials.
Finally, the technological integration potential of these materials within the microbolometer fabrication line will be evaluated, including the mechanical strength and the thermal robustness.
AI model deployment using Hardware-Aware on-chip Fine Tuning
Emerging unconventional hardware technologies are essential for future Edge-AI applications, but they often suffer from variability, mismatches, and technology dispersion. These non-idealities can strongly reduce AI inference accuracy if no fine-tuning or calibration is applied. Traditional supervised fine-tuning is difficult to industrialize because it raises issues related to data confidentiality, service quality, software complexity, and hardware constraints.
This PhD project aims to develop hardware-algorithm co-design methods that avoid the need for fully supervised on-chip retraining. The main goal is to create task-agnostic, inference-level self-calibration strategies able to compensate hardware mismatches at the system level. The work will study existing adaptation methods, including weight-based, feature-based, output-based, and domain adaptation approaches.
The project will define a relevant Edge-AI application, develop a generic fine-tuning method, and validate it through low-level electrical simulations. If possible, the proposed algorithm may also be tested experimentally on a custom ASIC-based hardware setup.
Low Power Image Sensor for Distributed Processing in Cameras Network
Working in a collaborative academic project, your task will be to develop a smart image sensor for a wireless camera network embedding distributed AI computing.
Current camera network contains several standard cameras that transmit their images to a global server performing the targeted inference processing. This kind of architecture proposes energy and frugality performances that are not compatible with IoT requirements.
The project goal is to tackle hardware frugality through a distributed and collaborative approach based on ultra-low-power computing nodes. Each node’s inference core will be built around ASIC processors performing calculations in analog form. The final demonstrator will consist of a wireless network of “motes” (sensor network nodes) integrating dedicated image sensors paired with hybrid processors performing analog processing.
In this context, the mote’s image sensor must extract strategic features with frugality and efficiency which implies that you have to define, design and test an innovative readout architecture of a standard imager. In collaboration with the academic partners, you will be involved in the definition of the overall mote architecture allowing to define basically the output data format and the output procedure of the imager including potential pre-processing for the distributed inference computations. The studied architecture will integrate innovative low power solutions to address the targeted IoT applications and perform both image acquisitions and AI pre-processing.
As an image sensor demonstrator is planned in this PhD Thesis, the work will be conducted at CEA-Leti in the L3i Laboratory, using professional IC design tools and software development environments.
Architecture of small animal single photon emission tomograph.
Medical imaging, a source of major innovations, presents remarkable potential for meeting new challenges with the growing demand for precision medicine, which requires cutting-edge diagnostic and therapeutic approaches personalized for each patient.
In this context, CEA-Leti proposes a PhD internship to develop a dedicated preclinical SPECT (Single Photon Emission Tomography) imager that will provide the performance (spectral information, high resolution, and high sensitivity) needed by researchers developing new radiopharmaceuticals.
The laboratory has a recognized expertise on CZT (Cadmium Zinc Telluride) semiconductor imagers enabling better spatial and energy resolution than scintillators used by most systems. They open new opportunities for emission imaging like easier Compton imaging, multi-isotope imaging and better contrast.
The candidate will have to handle the following tasks:
1. Study the state of the art of small animal SPECT imagers to participate with the team to the choice of system specification and choice of a draft architecture.
2. Simulate this architecture by using Monte-Carlo codes and optimize free parameters.
3. Design and manufacture the prototype system, with the help of the team including system engineers.
4. Test and validate the imaging capabilities, using reconstruction algorithms provided by the team.
The PhD will be conducted inside an instrumentation laboratory with access to acquisition electronics, detectors, motorized mechanics, gamma-ray sources and processing/simulation software. The candidate will also work in collaboration with a clinical and preclinical centre (at Orsay’s hospital) for conducting imaging test on phantoms and animals.
Study of new photodiode architecture for IR imagers
In the field of high-performance infrared detection, CEA-LETI plays a leading role in the development of the HgCdTe material, which today offers such performance that it is integrated into the James Webb Space Telescope (JWST) and allows the observation and study of deep space with unparalleled precision to date. However, we believe that it is still possible to make a significant step forward in terms of detection performance. Indeed, it seems that a fully depleted structure, called a PiN photodiode, could further reduce the dark current (and thus reduce noise and gain sensitivity at low photonic flux) compared to the non-fully depleted structures currently used. This architecture would represent the ultimate photodiode and would allow either a further increase in performance at a given operating temperature or a significant increase in the operating temperature of the detector, with the potential to open new fields of application by greatly simplifying cryogenics.
Your role in this thesis work will be to contribute to the development of the ultimate photodiode for very high-performance infrared detection, characterize and simulate the PiN photodiodes in HgCdTe technology manufactured on our photonic platform.
Candidate Profile:
You hold a Master's degree in optoelectronics and/or semiconductor material physics and are passionate about applied research.
The main technical skills required are: semiconductor component physics, optoelectronics, data processing, numerical simulations, interest in experimental work to carry out characterizations in a cryogenic environment but also theoretical work to carry out numerical simulations.
The PhD student will be integrated into a multidisciplinary team ranging from the growth of II-VI materials to electro-optical characterization, including microelectronics manufacturing processes in clean rooms and the packaging issues of such objects operating at low temperature.
Integration of security functions for imagers: encryption, watermarking using compact functions close to the sensor
Illicit uses of images have dramatically risen with deepfake content manipulation or unauthorized access. Securing images at their source i.e., at the image sensor level, is key to addressing the challenges of this field of cybersecurity. The "trusted imagers" concept addresses the need to ensure image security, authentication, and encryption starting at the point of acquisition.
Building on our initial research, notably regarding the in-situ generation of keys, your PhD thesis will focus on finding innovative solutions to integrate security functions into image sensors with the challenge of meeting the requirements of low power consumption and compact integrated architecture, while keeping a high level of security. After an initial phase aiming at the development of the skills specific to the thesis, and depending on your background and interests, your work will involve:
- Developing encryption and/or watermarking algorithms in Python to evaluate their complexity, then proposing compact versions compatible with integration into image sensors.
- Evaluating the impact of algorithmic choices and hardware implementation on image quality.
- Designing and validating hardware architectures that implement the algorithms.
- Designing the integrated circuits implementing these functions.
With the ultimate goal of fabricating an integrated circuit, the work will be conducted at CEA-Leti, using professional IC design tools and software development environments.
Development of multiplexed photon sources for quantum technologies
Quantum information technologies offers several promises in domains such as computation or secured communications. Because of their robustness against decoherence, photonic qubits are particularly interesting for quantum communications applications, even at room temperature. They also offers an alternative to other qubits technologies for quantum computing. For the large-scale deployment of those applications, it is necessary to have cheap, compact and scalable devices. To reach this goal, silicon photonics platform is attractive. It allows implementing key components such as generation, manipulation and detection of photonic qubits. On the silicon platform, the photonic qubits are generated by pair through non linear process. has several benefits, such as working at room temperature, the ability to generate heralded single photon, or undistiguishable photons with spatially distinct sources.
The goal of this thésis is to work on the development, the fabrication monitoring, and the characterization in the laboratory of multiplexed photon sources on silicon chips to overcome the limits in the process of photon generation with one source. In order to achieve a full integration on chip, it is also essential to properly filter unwanted light in order to keep only the photons that are of interest. As a consequence you will also focus on the development of intgrated filters with high rejection rate.