Topologically Isolated Mode Acoustic Resonators

Timing is a key function in electronic circuits. Beyond on-chip signals synchronization, it also allows the synchronization of wireless data transmissions. Accurate time references require stable frequency sources, which also benefit to sensor applications. The gold standard for time or frequency generation is still quartz resonators, which are however bulky and difficult to miniaturize. Research is therefore still ongoing to provide high quality factor (> 10,000) resonators, ideally capable of operating at frequencies of several GHz. A key to reach such high quality factors is to confine strongly the mechanical vibration of micro-size structures in order to make them insensitive to external perturbations. Recently, the field of topological acoustics has demonstrated the capability to confine elastic waves in very small volumes concentrated at the interface between periodic structure, and to provide extremely high quality factor resonances.
This PhD position focuses on exploiting topologically protected modes in piezoelectric microstructures to provide next generations of high quality factor resonators, which may be used in oscillators or even filter circuits. Leveraging the know-how of CEA Leti in the design and fabrication of such components, the PhD will be part of an international collaboration with well established academic laboratories (Politecnico di Milano, Imperial College FEMTO-ST Institute) and industrial partners.
The candidate will model and design structures supporting topologically protected modes, combinining finite element simulations with simplified numerical approaches which reduce computation times. He will follow the fabrication of demonstrators in collaboration with the process integration teams in the CEA Leti clean rooms, and carry on measurements of the proposed resonators.

High-Endurance Chalcogenide Memories for Next-Generation AI

Discover a unique phd opportunity where you will dive into the heart of innovation in memory technologies. You will develop strong expertise in areas such as electrical characterization and the understanding of degradation phenomena in chalcogenide-based memories.

By joining our multidisciplinary teams, you will play a key role in studying and improving the endurance of Phase-Change Memory (PCM) and Threshold Change Memory (TCM) devices—two promising technologies for high-performance artificial intelligence applications. You will take part in innovative projects combining scientific rigor and applied research on nanoscale devices, working closely with another CEA PhD student who conducts advanced physico-chemical analyses (TEM) to investigate degradation mechanisms.

You will have the opportunity to contribute actively to tasks such as:

Electrical characterization of PCM and TCM devices to analyze cycling-induced degradation
Development and evaluation of innovative programming protocols to extend endurance limits
Proposing solutions to improve the reliability and performance of next-generation memories
Regular collaboration and discussion with the CEA PhD student to interpret TEM results and draw conclusions about degradation mechanisms

SiGe HBT LNA for cryogenic applications: design, characterization and optimization

The global race to build a quantum computer is heating up! These cutting-edge systems operate at temperatures below 4 K to preserve the delicate quantum states essential for computation. To achieve efficient control and detection, conventional electronic circuits must perform reliably at cryogenic temperatures, in close proximity to the quantum processor, thereby reducing wiring complexity and boosting performance. Beyond quantum computing, other domains—such as space exploration, high-performance computing, or high-energy physics—also require transistors capable of operating below 100 K.
During this phD, you will perform radiofrequency (RF) electrical characterization and modeling of Silicon-Germanium Heterojunction Bipolar Transistors in cryogenic environment, contributing to a deeper understanding of their behavior and optimizing their potential for extreme-condition applications. The objectives are twofold:
1.RF Electrical Characterization and Modeling:
•Conduct RF electrical measurements of SiGe HBTs at cryogenic temperatures.
•Develop accurate models to describe their behavior in cryogenic environments.
2.Optimization of Low-Noise Amplifiers (LNAs):
•Study the low-temperature behavior of individual passive and active devices composing an LNA.
•Optimize the design of low-noise amplifiers (LNAs) for cryogenic applications.

Advancing All-Solid-State Microbatteries: Interface Stabilization and Degradation Mitigation for Long-Term Reliability

This PhD project focuses on advancing all-solid-state microbatteries for miniaturized energy storage applications, such as wearable electronics, IoT systems, and implantable medical technologies. The research aims to stabilize and mitigate degradation at the electrode/electrolyte interfaces, which are critical bottlenecks in solid-state microbattery performance. The project involves two main research axes: (1) the study and optimization of ultrathin films (sub-nanometer to nanometer scale deposited by ALD) for engineering the interfaces in LiCoO2/LiPON/Li stacks, and (2) a fundamental investigation of the mechanisms responsible for interface degradation. The study will involve the fabrication and characterization of partial and complete stacks using techniques like cyclic voltammetry (CV), electrochemical impedance spectroscopy (EIS), X-ray diffraction (XRD), and scanning electron microscopy (SEM). The incorporation of alloying metals (e.g., Ag, Au) between the buffer layer and lithium will also be explored to enhance lithium-metal interface stability. The expected outcomes include an optimized microbattery stack capable of exceeding 1,000 cycles with minimal increase in interfacial resistance and a comprehensive framework describing degradation mechanisms and buffer layer effects.

Study of mechanical stress on Solid State Micro-batteries

CEA-Leti provides integrated microstorage solutions, including solid state (or solid electrolyte) microbatteries. Solid-state micro-batteries are among the most promising microstorage technologies for applications in several fields such as the internet of things and implantable devices for medical use. The objective of this thesis is to study the impact of mechanical stresses on microbatteries, particularly during microbattery charge/discharge cycles. To this end, two approaches will be considered: experimental study with the development of mechanical test benches and numerical simulation.
The PhD student's work will begin with the development of test benches, the first of which will apply variable pressure to the surface of a microbattery during charge/discharge cycles. He/she will be required to develop the pressure measurement equipment. Once the mechanical test bench is operational, other characterizations, such as measuring anode deformations, will be considered. In parallel with this experimental work, a mechanical model will be developed. This model will be progressively refined using the experimental results obtained with the mechanical test bench, and new characterizations may be implemented in order to obtain the mechanical properties of the different materials used. Ultimately, the objective will be to propose the integration of new layers to improve the mechanical performance of microbatteries during cycling.

Study of Failure Modes and Mechanisms in RF Switches Based on Phase-Change Materials

Switches based on phase change materials (PCM) demonstrate excellent RF performance (FOM <10fs) and can be co-integrated into the BEOL of CMOS processes. However, their reliability is still very little studied today. Failure modes such as heater breakage, segregation, or the appearance of cavities in the material are shown during endurance tests, but the mechanisms of these failures are not discussed. The objective of this thesis will therefore be to study the failure modes and mechanisms for different operating conditions (endurance, hold, power). The analysis will be carried out through electrical and physical characterizations and accelerated aging methods will be implemented.

Reinventing Microspeakers: From Planar Limits to 3D Designs for Ultrasonic Modulation Loudspeakers

Are you looking for a PhD at the intersection of acoustics, microsystems, and innovation? This project may be for you.This PhD focuses on the design, fabrication, and experimental validation of an innovative MEMS microspeaker concept based on ultrasound demodulation. Conventional micro transducers face a major limitation: they require large planar surfaces to displace sufficient air at low frequencies, leading to increased device size and manufacturing cost. This project explores an alternative architecture using vertical blade structures, exploiting the third dimension together with ultrasound demodulation to improve electro acoustic efficiency while reducing device footprint.

Building on preliminary exploratory work, the objective of the PhD is to develop a complete MEMS loudspeaker demonstrator. The work will include physical modeling, multi-physics simulation, device design optimization, microfabrication process development, and experimental electro acoustic characterization. Particular attention will be given to identifying and overcoming the physical and technological limitations governing device performance.

The candidate will design and simulate the device architecture and contribute to the definition of the fabrication process in close interaction with microfabrication specialists. The PhD work will also include acoustic and electrical characterization of the fabricated devices in order to validate the proposed concepts and compare experimental results with modeling predictions. The PhD will take place in a multidisciplinary environment, providing access to expertise in acoustics, MEMS design, microfabrication processes, and electro acoustic measurement.

3D interconnects for the design and fabrication of quantum processor units

To increase the performance of quantum computers, three-dimensional (3D) integration is now the key! Using technologies such as flip-chip bonding, multi-layer wiring or even through-silicon vias (TSV), 3D integration offers solutions to increase the number of qubits on a processor, reduce signal loss and cross-talk and even improve thermal management. All of these aspects are essential to continue scaling qubits to achieve fault-tolerant quantum computing.
Our team is developing 3D interconnect technologies (e.g. superconducting microbumps and TSV) for the next generation of quantum processors. This thesis will focus on the electrical and radiofrequency characterization of such interconnects and of the quantum devices integrated nearby to gain knowledge on how these 3D technological bricks may impact the quantum properties.
This position will bring you at the boundary between material, technological and physical challenges of quantum systems. You will work with teams from CEA-LETI and CEA-IRIG. As a PhD candidate, you will take part in the design and layout of test vehicles and in their fabrication. You will also lead the low temperature measurements of the fabricated samples, perform the associated analysis and write reports.

Integrated material–process–device co-optimization for the design of high-performance RF transistors on advanced nanometer technologies

This PhD research focuses on the integrated co-optimization of materials, fabrication processes and device architectures to enable high-performance RF transistors on advanced nanometer-scale technologies. The work aims to understand and improve key RF figures of merit—such as transit frequency, maximum oscillation frequency, noise behaviour and linearity—by establishing clear links between material choices, process innovations and transistor design.

The project combines experimental development, structural and electrical characterization, and advanced TCAD simulations to analyse the strengths and limitations of different integration schemes, including FD-SOI and emerging 3D architectures such as GAA and CFET. Particular attention will be given to the engineering of optimized spacers, gate stacks, junction placement and epitaxial source/drain materials in order to minimize parasitic effects and enhance RF efficiency.

By comparing planar and 3D device platforms within a unified modelling and characterization framework, the thesis aims to provide technology guidelines for future generations of energy-efficient RF transistors targeting applications in 5G/6G communications, automotive radar and low-power IoT systems.

Understanding the origin of charge noise in quantum devices

Thanks to strong collaborations between teams from several research institutes and the cleanroom facilities at CEA-LETI, Grenoble has been a pioneer in the development of spin qubit devices as a platform for quantum computing. The lifetime of these spin qubits is highly sensitive to fluctuations in the qubit's electrical environment, known as charge noise. Charge noise in spin qubit devices potentially originates from trapping/detrapping events within the amorphous and defective materials (e.g., SiO2, Si3N4). This PhD project aims to better understand the origin of this noise through numerical simulations, and guide the development of quantum devices towards lower noise levels and higher quality qubits.

The goal of this PhD position is to improve the understanding of noise in spin qubit devices through multi-scale simulations going from the atomistic to the device level. The PhD candidate will use codes developed at CEA for the numerical modeling of spin qubits and will leverage supercomputing facilities to perform the simulations. Depending on the candidate’s profile and interests, code development may be considered. The work will also involve collaborations with experimentalists to validate simulation methods and to aid in the interpretation of experimental results.

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