Dies to wafer direct bonding: from physical mechanisms to the development of thin stackable dies
Direct dies-to-wafer bonding has become, in recent years, a major development axis in microelectronics and at the heart of many LETI projects, both in silicon photonics and for 3D applications involving hybrid bonding.
Due to their small size, die bonding allows the study of direct bonding edge effects and the implementation of new direct bonding processes that can shed original light on the mechanisms of direct bonding, which are already well studied at LETI. From a more technological perspective, the development of thin stackable chips will also be a very interesting technological key for many applications. This approach is a clever alternative to classical damascene processes to address the challenges related to the planarization of surfaces with low density of high topographies.
Selective deposition of oxides by ALD
For next-generation microelectronics, Area Selective Deposition (ASD)is a promising approach to simplify integration schemes for the most advanced technology nodes. These ASD approaches need to be adapted according to a trio comprising the material to be deposited, the growth surface, and the inhibited surface.
This PhD focuses on the area selective deposition of oxides (such as SiO2, Al2O3, …) on Si or SiO2 and not on silicon nitride (SiN), which is one of the most complex topics in ASD, and aims to evaluate the relevance of this type of process for simplifying the integration and the fabrication of advanced FDSOI transistors.
To develop this selective oxide deposition process, various approaches aiming at making SiN an inhibitor of the Atomic Layer Deposition (ALD) will be explored (plasma treatments, Small Molecular Inhibitors, combination of both, etc.). Dedicated surface characterizations will be carried out in order to better understand the mechanisms of inhibition at the origin of the selective deposition and allowing to achieve high selectivity for oxide thicknesses of 10 nm and above.
This PhD project will take place at CEA-LETI, within the advanced materials deposition department, in collaboration with LMI UMR 5615 CNRS/UCBLyon. The student will have access to the CEA-LETI 300 mm cleanroom fabrication platforms for thin film deposition by PEALD, the CEA nanocharacterization platform and gas-phase surface functionalization at LMI. Surface analyses and thin film characterizations (ellipsometry, XRR, AFM, FTIR, contact angle, SEM, XPS, ToF-SIMS) will be used to determine the best selectivity and understand the physico-chemical mechanisms.
Next-Gen Surface Analysis for Ultrathin Functional Materials
Advanced nanoelectronics and quantum devices rely on ultrathin oxides and engineered interfaces whose chemical composition, stoichiometry and thickness must be controlled with sub-nanometer precision. LETI is installing the first 300-mm multi-energy XPS–HAXPES tool with angle-resolved capability, enabling quasi in situ chemical metrology from deposition to characterization.
This PhD will develop quantitative, multi-energy and angle-resolved XPS/HAXPES methodologies for ultrathin oxides and oxynitrides, validate measurement accuracy, and establish robust protocols for quasi in situ transfer of sensitive layers. Applications include advanced CMOS stacks and quantum Josephson junctions, where sub-2 nm AlOx barriers critically determine device performance.
The project directly supports the development of next-generation quantum technologies, advanced photonics and energy-efficient microelectronics by improving the reliability and stability of nanoscale materials. The work will be carried out within a strong multi-partner framework.
Reducing damage and loading in high aspect ratio III-V etching
The growing demand for III-V semiconductors in high-efficiency photovoltaics, quantum photonics, and advanced imaging technologies requires innovative and cost-effective fabrication methods. This PhD project focuses on developing plasma etching processes for In-based III-V semiconductors to produce high aspect ratio (HAR) structures on large wafers from 100 to 300 mm. The research addresses two key challenges: understanding how etching process windows evolve with material loading and process conditions (physical vs. chemical dominance), and minimizing electrical degradation induced by HAR etching, which is critical for device performance.
These challenges are fundamentally linked to the low volatility of In-based etch byproducts, the need to balance kinetic and thermal energy inputs to enhance etch selectivity, and the management of etch loading effects for large-scale production. The experimental approach will leverage CEA-Leti's state-of-the-art facilities, including the Photonics platform for 2–4-inch wafer processing, which enables masking strategies (hard mask deposition, photolithography) and low-temperature (150°C) etching.
Characterization will involve SEM for etch profile analysis, XPS for surface composition, and TEM-EDX for sidewall quality assessment. Damage evaluation will be performed using near-infrared photoluminescence decay to measure minority carrier lifetime and identify recombination centers. The work aims to develop optimized HAR etching processes (aspect ratios >10, critical dimensions <1 µm) for In-based III-V materials, investigate pulsed plasma techniques to reduce etch-induced damage, and provide insights into defect formation mechanisms to guide process optimization for industrial applications.
Introduction of innovative materials for sub-10nm contact realization
As part of the FAMES project and the European ChipACT initiative, which aim to ensure France’s and Europe’s sovereignty and competitiveness in the field of electronic nano-components, CEA-LETI has launched the design of new FD-SOI chips. Among the various modules being developed, the fabrication of electrical contacts is one of the most critical modules in the success of advanced node development.
For sub-10 nm node, the contact realization is facing a lot of challenges like punchthrough (due to low etch selectivity during contact etching), voids during metal deposition, self-alignment, and parasitic capacitance. New breakthrough approach has recently been proposed consisting in the deposition of new dielectric films with chemical gradient. This thesis focuses on the development (deposition an etching processes) of new gradient compounds incorporated into SiO2 to address the current issues.
Advanced characterization of defects generated by technological processes for high-performance infrared imaging
This thesis falls within the field of cooled infrared detectors. The CEA-LETI-MINATEC Infrared Laboratory specializes in the design and manufacture of infrared camera prototypes used in defense, astronomy, environmental monitoring, and satellite meteorology.
In this context of high-performance imaging, it is crucial to ensure optimal detector quality. However, manufacturing processes can introduce defects that can degrade sensor performance. Understanding and controlling these defects is essential to increase reliability and optimize processes.
The objective of the thesis is to identify and precisely characterize these defects using cutting-edge techniques, rarely combined, such as Laue microdiffraction and FIB-SEM nanotomography, enabling structural analysis at different scales. By linking the nature and origin of defects to manufacturing processes and quantifying their impact on performance, the doctoral student will contribute directly to improving the reliability and efficiency of next-generation infrared sensors.
The doctoral student will join a team covering the entire detector manufacturing chain and will actively participate in the development (LETI clean room) and structural characterization (CEA-Grenoble platform, advanced techniques) of samples. He/she will also be involved in electro-optical characterization in partnership with the Cooled Infrared Imaging Laboratory (LIR), which specializes in detailed analysis of active materials at cryogenic temperatures.
Advanced electrode materials by ALD for ionic devices
This work aims to develop Advanced ultrathin cunductive layers (<10nm) by ALD (Atomic Layer Deposition)for électrodes use(resistivity 100). The other challenge aims to reduce the ALD-based electrode layer thickness less than 5nm while still maintaining the advanced electric properties (resistivity in the mOhm range).
This work covers multiple aspects including inter alia ALD process, ALD precursors, Elementary characterization of intrinsec properties (physico-chemical, morphological and electrochemical) as well as integration on short loop 3D devices.
Superconducting silicide contacts on hyperdoped silicon by nanosecond pulsed-laser annealing
In the race towards building a quantum computer, there is a deep interest in fabricating devices based on the robust and scalable silicon FD-SOI technology. One example is the Josephson Field Effect Transistor (JoFET) whose operability relies on the high transparency of the interface between the superconducting source/drain regions and the semiconducting channel. Such transparency could be improved by doping the source/drain regions, and hence lowering the Schottky barrier height at the superconductor/semiconductor interfaces.
This PhD aims at developing highly transparent superconducting silicide contacts on a 300 mm production line using Nanosecond Pulsed Laser Annealing (NPLA). NPLA will play a key role for reaching extremely high doping concentrations in silicon [1,2], then forming the superconducting silicides (CoSi2, V3Si) with minimal thermal budget and related dopant deactivation. A particular focus will be devoted on the stresses during silicide formation and their impact on the superconducting critical temperature. Also, the distribution of dopants will be assessed by Atom Probe Tomography (APT), an advanced 3D imaging technique capable of imaging the distribution of dopants at the atomic scale [3]. Finally, electrical measurements on fabricated junctions and transistors will be carried out at low temperature (< 1 K) in order to evaluate the transparency of the superconducting contacts.
Artificial Intelligence for the Modeling and Topographic Analysis of Electronic Chips
The inspection of wafer surfaces is critical in microelectronics to detect defects affecting chip quality. Traditional methods, based on physical models, are limited in accuracy and computational efficiency. This thesis proposes using artificial intelligence (AI) to characterize and model wafer topography, leveraging optical interferometry techniques and advanced AI models.
The goal is to develop AI algorithms capable of predicting topographical defects (erosion, dishing) with high precision, using architectures such as convolutional neural networks (CNN), generative models, or hybrid approaches. The work will include optimizing models for fast inference and robust generalization while reducing manufacturing costs.
This project aligns with efforts to improve microfabrication processes, with potential applications in the semiconductor industry. The expected results will contribute to a better understanding of surface defects and the optimization of production processes.
Development of 4D-STEM with variable tilts
The development of 4D-STEM (Scanning Transmission Electron Microscopy) has profoundly transformed transmission electron microscopy (TEM) by enabling the simultaneous recording of spatial (2D) and diffraction (2D) information at each probe position. These so-called “4D” datasets make it possible to extract a wide variety of virtual contrasts (bright-field imaging, annular dark-field imaging, ptychography, strain and orientation mapping) with nanometer-scale spatial resolution.
In this context, 4D-STEM with variable beam tilts (4D-STEMiv) is an emerging approach that involves sequentially acquiring electron diffraction patterns for different incident beam tilts. Conceptually similar to precession electron diffraction (PED), this method offers greater flexibility and opens new possibilities: improved signal-to-noise ratio, faster two-dimensional imaging at higher spatial resolution, access to three-dimensional information (orientation, strain, phase), and optimized coupling with spectroscopic analyses (EELS, EDX).
The development of 4D-STEMiv thus represents a major methodological challenge for the structural and chemical characterization of advanced materials, particularly in the fields of nanostructures, two-dimensional materials, and ferroelectric systems.