Merging Optomechanics and Photonics: A New Frontier in Multi-Physics Sensing
Optomechanical sensors are a groundbreaking class of MEMS devices, offering ultra-high sensitivity, wide bandwidth, and seamless integration with silicon photonics. These sensors enable diverse applications, including accelerometry, mass spectrometry, and gas detection. Optical sensors, leveraging photonic integrated circuits (PICs), have also shown great potential for gas sensing.
This PhD focuses on developing a hybrid multi-physics sensor, integrating optomechanical and optical components to enhance sensing capabilities. By combining these technologies, the sensor will provide unprecedented multi-dimensional insights, pushing MEMS-enabled silicon photonic devices to new limits.
At CEA-Leti, you will access world-class facilities and expertise in MEMS fabrication, photonics, and sensor integration. Your work will involve:
-Sensor Design – Using analytical Tools and simulation software for numerical analysis to optimize device architecture.
-Cleanroom Fabrication – Collaborating with CEA’s expert teams to develop the sensor.
-Experimental Characterization – Conducting optomechanical and optical evaluations.
-Benchmarking & Integration – Assessing performance with optics, electronics, and fluidics.
This PhD offers a unique chance to merge MEMS and silicon photonics in a cutting-edge research environment. Work at CEA-Leti to pioneer next-generation sensor technology with applications in healthcare, environmental monitoring, and beyond. Passionate about MEMS, photonics, and sensors? Join us and help shape the future of optomechanical sensing!
Towards a low-resistive base contact for the InP-HBT transistor
Join CEA LETI for an exciting technological journey! Immerse yourself in the world of III V
based transistors integrated on compatible CMOS circuits for 6 G future communications
This thesis offers the chance to work on a ambitious project, with potential to continue into
a thesis If you're curious, innovative, and eager for a challenge, this opportunity is perfect
for you!
As the consumption of digital content continues to grow, we can foresee that 6 G
communication systems will have to find more capacity to support the increase in traffic
New Sub THz frequencies based systems are a huge opportunity to increase data rate but
are very challenging to build and maturate the power amplifier required to transmit a
signal will have to offer sufficient power and energy efficiency which is not obtained with
actual silicon technology InP based HBTs (Heterojunction Bipolar Transistors) developed
on large Silicon substrates have the potential to meet the requirements and be integrated
as close as possible to the CMOS circuits to enable minimal system/interconnect losses
Sb based semiconductors for GaAsSb HBT are emerging as highly promising materials,
especially for its electrical properties to integrate the Base layer of the Transistor It is
therefore necessary to produce high performance electrical contacts on this type of
semiconductor while remaining compatible with the manufacturing processes of the Si Fab
technology platforms
Throughout
this thesis, you will gain a broad spectrum of knowledge, beneficiate from the
rich technical environment of the 300 200 mm clean room and the nano characterization
platform You will collaborate with multidisciplinary teams to develop a deep understanding
of the ohmic contacts and analyse existing measurements Several apsects of the metal
(Ni or Ti p GaAs 1 x Sb x contact will be investigated
•Identify wet and plasma solutions allowing the GaAsSb native oxide removing without
damaging the surface with XPS and AFM
•Characterize GaAs 1 x Sb x epitaxy doping level (Hall effect, SIMS, TEM)
•Understand the phase sequence during annealing between the semiconductor and the
metal with XRD and Tof SIMS Manage this intermetallic alloys formation to not
deteriorate the contact interface (TEM image associated)
•Evaluate electrical contact properties using TLM structures Measurement of the
specific contact resistivity, sheet resistance of the semiconductor ant transfer length
associated The student will be a motive force to perform electrical tests on an automatic prober
architecture for embedded system of Automated and Reliable Mapping of indoor installations
The research focuses on the 3D localization of data from measurements inside buildings, where satellite location systems, such as GPS, are not operational. Different solutions exist in the literature, they rely in particular on the use of SLAM (Simultaneous Localization And Mapping) algorithms, but the 3D reconstruction is generally carried out a posteriori. In order to be able to propose this type of approach for embedded systems, a first thesis was carried out and led to a choice of algorithms to embed and a draft of the electronic architecture. A first proof of concept was also realized. Continuing this work, the thesis will have to propose a method allowing the localization device to be easily embedded on a wide range of nuclear measuring equipment (diameter, contamination meter, portable spectrometry, etc.). The work is not limited to a simple integration phase; it requires an architectural exploration, which will be based on adequacy between algorithm and architecture. These approaches will make it possible to respect different criteria, such as weight and small size so as not to compromise ergonomics for the operators carrying out the maps and quality of the reconstruction to ensure the reliability of the input data for the Digital Twin models.
Bayesian Neural Networks with Ferroelectric Memory Field-Effect Transistors (FeMFETs)
Artificial Intelligence (AI) increasingly powers safety-critical systems that demand robust, energy-efficient computation, often in environments marked by data scarcity and uncertainty. However, conventional AI approaches struggle to quantify confidence in their predictions, making them prone to unreliable or unsafe decisions.
This thesis contributes to the emerging field of Bayesian electronics, which exploits the intrinsic randomness of novel nanodevices to perform on-device Bayesian computation. By directly encoding probability distributions at the hardware level, these devices naturally enable uncertainty estimation while reducing computational overhead compared to traditional deterministic architectures.
Previous studies have demonstrated the promise of memristors for Bayesian inference. However, their limited endurance and high programming energy pose significant obstacles for on-chip learning applications.
This thesis proposes the use of ferroelectric memory field-effect transistors (FeMFETs)—which offer nondestructive readout and high endurance—as a promising alternative for implementing Bayesian neural networks.
Cryogenic characterization of emerging memories for space and/or quantum computing applications
Low temperature computing is a new proposal to boost the technological performances beyond the frontiers in the aerospace, high performance servers, quantum computing and data center domain.
Different emerging technologies have been showing promising features at single device level during the ongoing Ph.D. work: the programmability of the OxRAMs was proved down to 4K and efforts were focused on the understanding of the interactions between the selector and the resistor composing the memory cell. FeRAMs show a better programming efficiency and stability at low temperature probably due to a crystallographic change driven by the program operation; hypothesis that lies unproved. PCM also showed a programmability down to 12K and may be included in the analysis.
Statistical behavior of R&D chip at low temperature will be the key theme of this proposition knowing that very few publications appeared in the scientific literature leaving much room for analysis and comprehension.
Throughout this Ph. D., you will gain a broad spectrum of knowledge, spanning cryogenics, microelectronics reliability and device physics. Different technologies developed in LETI will be statistically screened in this innovative scenario. Modeling of the conduction phenomena might be also considered. You will be part of a team of 7-8 people between permanent, researchers and students and you will be managed to share your work with them.
Field Effect Transistor with Oxide Semiconductor Channel: Multi-Level Synaptic Functions and Analog Neurons
This thrilling PhD position invites you to dive into the groundbreaking field of 2T0C (Two-Transistor, Zero-Capacitor) BEOL FET (Back-End-of-Line Field-Effect Transistor) based neurons and synapses, a revolutionary approach poised to transform neuromorphic computing. As a PhD student, you will be at the forefront of research that bridges advanced semiconductor technology with brain-inspired architectures, exploring how these innovative neuron circuits can emulate synaptic functions and enhance data processing efficiency.
Throughout this project, you will engage in hands-on design and characterization of cutting-edge 2T0C neuron circuits, utilizing state-of-the-art tools and techniques. You’ll collaborate with a dynamic, multidisciplinary team of engineers and researchers, tackling exciting challenges related to device performance and energy optimization.
Your work will involve extensive characterization of BEOL FET devices and circuits. You will have the opportunity to propose, specify and design new memory read architectures, that enables the exploration of multi-level synaptic behaviors toward the implementation of more energy and area efficient next-generation neuromorphic systems.
Join us for this unique opportunity to push the boundaries of technology and be part of a transformative journey that could redefine the future of computing! Your contributions could pave the way for breakthroughs in brain-inspired systems, making a lasting impact on the field.
DCDC converter based on chiplet for HPC applications
High-performance computing (HPC) is becoming more and more critical for the AI
advancement. HPC requires significant amount of power for the needed processing
and struggles with thermal dissipation issues. Recent research highlights the need for
innovative solutions to improve power management for AI processors.
In our research team, you will be responsible for developing an enhanced power
management unit to provide a stable power supply for high-performance processors.
By exploring cutting-edge DC-DC converter topologies and emerging silicon passive
components (inductors and capacitors), the main objective is to design a highly efficient
DC-DC converter that optimizes both power efficiency and density. This project also
involves analyzing power distribution networks and integrated circuit design to optimize
the overall power delivery efficiency with relatively small form factor.
As a PhD student, you will be engaged in various technical tasks, from system-level
analysis to IC design. Working in an IC-design lab, you will collaborate with digital
design and component teams to address both device- and system-level challenges.
Your tasks will be distributed across system architecture (40%), passive component
analysis (20%), and converter design (40%).
Superconducting RF Filters for Quantum Applications
Within the Quantum Devices Laboratory, you will work in an environment ranging from fundamental physics to new nano-electronics technologies, with a team that collaborates closely with quantum computing startups and physicists from CEA-IRIG and Institut Néel.
The operating conditions of qubits (cryogenic temperatures <= 1K, GHz frequencies , high signal density) require the development of suitable components and technological bricks. In particular, the passive radiofrequency components developed around the CEA-LETI superconducting interposer technology show extremely interesting electrical properties up to several GHz. These elements, including inductors available over wide value ranges, have already made it possible to establish the first proofs of concept for very compact and low-loss RF filters. The integration of superconducting materials now makes it possible to envisage the creation of new high-performance filters adapted to signal management in cryogenic environments.
You will be required to develop your expertise in the physics of materials and superconducting components. You will study the different superconducting filters that exist in the scientific literature. Using the models developed in the laboratory and the results of the RF measurements in which you will participate, and relying on 3D RF electromagnetic simulation, you will contribute to the design of different RF filters and functions that meet the needs of cryogenic applications.
3D Hybrid Synapses for Energy-Efficient and Adaptive Edge AI
This PhD thesis is part of the growing field of embedded AI for the Internet of Things (IoT), where constraints in energy, area, and connectivity require rethinking the learning mechanisms of neural networks. The goal is to design neuromorphic architectures based on 3D hybrid synapses combining FeRAM and ReRAM, within an in-memory computing framework. The objective is to enable local adaptation of the model—drawing from machine learning approaches and potentially compatible with plasticity mechanisms such as STDP, VDSP, etc.—while maintaining efficient inference adapted to naturally asynchronous information. The PhD student will develop a heterogeneous memory architecture, design an appropriate local learning protocol, and implement integrated circuit demonstrators. Experimental validation on edge-relevant tasks (e.g., sensory classification) will assess power consumption, network accuracy, and adaptability. Publications and patents are expected outcomes of the thesis.
Study of the stability of Si-CMOS Structures for the implementation of Spin Qubits
Silicon-based spin qubits in CMOS structures stand out for their compatibility with semiconductor technologies and their scalability potential. However, impurities and defects introduced during fabrication lead to noise and instability, which affect their performance.
The objective is to characterize devices fabricated at CEA-Leti, from room temperature to cryogenic temperatures, to evaluate their quality and understand the physical mechanisms responsible for their instability. The goal is to improve the design of the devices and ideally establish a method to identify the most promising devices without requiring measurements at very low temperatures.
The candidate should have skills in the following areas:
- Experimental physics and semiconductors.
- Algorithm programming and data analysis.
- Knowledge in nanofabrication, low-temperature physics, and quantum physics (desirable).