Optimisation of the monolithic cascode device based on GaN/Si MOS-Channel HEMT technology
In order to adress the requirements of power conversion in the field of electrical vehicule or photovoltaics, high performance GaN on Silicon power devices need to be developped. Such power devices must fulfill agressive specifications in terms of threshold voltage (> 2V), nominal current (100-200A), breakdown voltage (650 and 1200V) and stability (low "current collapse", low hysteresis). Discrete cascode configuration, consisting in a combination of a low voltage E-mode Silicon die and a hihg voltage D-mode GaN/Si die in a single package, has been developped by different laboratories and companies to adress this need (Transphorm, On-Semi, NXP, IR…). However, this approach has some drawbacks like parasitic inductances, device pairing, need of additionnal protection devices, cost, temperature limitation due to the Si die...
The monolithic cascode is a very compact version of the cascode configuration that will allow to avoid those problems but also to improve the performance of E-mode devices developped at Leti (MOS-channel HEMT). Indeed, some actors in the field of GaN power devices already use this configuration with another E-mode technology (p-GaN gate).
Monolithic cascode device has been demonstrated recently by CEA-Leti in the frame of a PhD thesis (2014-2016) on the basis of the 200mm GaN/Si, CMOS compatible, MOS-channel HEMT technology. The aim of this post-doc is to optimize the monolithic cascode structure in terms of On-state resistance, Figure Of Merit, switching losses and high switching frequency capability in order to meet the specifications of our industrial partners.
Frequency tunable elastic plate wave resonators and filters
The increasing number of frequency bands having to be dealt with in mobile phone systems require a huge number of band pass filters in such systems. In this context, the capability to provide frequency tunable resonators and filters is seen as a key enabling element in future wireless transmission systems.
CEA-LETI has been working for more than 10 years on the development of resonators and filters exploiting the propagation of guided elastic waves in piezoelectric thin films. It has also proposed several concepts for frequency agile resonators and filters.
The purpose of this post-doc will be to further develop these ideas and to apply them to the design of demonstrators matching realistic specifications. In collaboration with the other member of the project team, more focused on fabrication in clean rooms, the candidate will propose innovative structures demonstrating frequency tuning of reconfigurability, and will take in charge their electrical characterization.
Innovative modeling for technology-design-system co-optimization
The post-DOC will support the device modeling part of a research project investigating new methodologies for system and circuit optimization with the aim of achieving a better integration between the knowledge of the detailed characteristics of a specific technology, the circuit-design methodology and the system architecture. The practical goal is to leverage the existing multi-disciplinary know-how for benchmarking of system and technologies to advance the analysis past the usual PPA, PPAY and PPAC approaches that are commonly deployed in such cases.
In more detail, the post-DOC will develop "pre"-spice models for actives and passives which will constitute the basic bricks for the optimization methodology developed in the overall project. Active device modeling will have a starting point in the works of EPFL based on the analytical expression of invariants such has the inversion coefficient.
Ultra Low Power RF Communication Circuit and System Design for Wake-Up Radio
Today, there is a strong demand in developing new autonomous Wake-Up radio systems with tunable performances and independent clocking system. The objectives of the proposed contract it to exploit the capacity of CMOS FD-SOI technologies to develop such devices, improving power consumption and RF performance above the state of the art, thanks to the natural low parasitic and tuning capacity through back biasing of the FD-SOI . A particular attention will be paid to the development of a new power efficient, fast settling, frequency synthesis system.
The chosen candidate will be involved both in RF system and circuit design, with the support of the experienced RF System & Design team.
2D materials for Contacts and Gate stacks for advanced CMOS applications
Transition Metal Dicalchogenides (TMDs) have displayed interesting properties in numerous fields of nanotechnoogy (CMOS, memory, sensors, photonics etc.), and emerge as promising materials thanks to their functional properties and potential for co-integration, facilitated by their intrinsic features (van der Waals materials). However, their applicative impact remains uncertain due to the challenge of developing their processing in a standard nanoelectronics environment while maintaining a good control of their fundamental properties. The candidate will quantify the electrical properties of various 2D materials in test structures derived from a silicon technology baseline (TLM, Cross-Bridge Kelvin Résistors, MOS capacitors), in order to provide guidelines for device prototyping.
Specifically, the primary aim is to assess the interest of these materials as interface layers rather than for transport, for improving:
- The contact resistivity via Fermi-level depinning.
- Control by the Gate over the inversion charge in the channel via a negative differential capacitance effect.
Design of a power integrated circuit using GaN on Si, characterization, implementation.
The objective is to propose an innovative solution to supply low voltage electronics (3 to 12VDC) or to charge accumulators, using industrial alternating voltages (230VAC / 400VAC). This type of device should benefit greatly from the contribution of integrated passive technologies and the possibilities offered by the ASICs developed at Leti, in particular GaN ASICs. This research program is part of the Leti’s ’power roadmap’. From the state of the art and concepts envisaged by CEA researchers, the post-doctoral student will have to imagine an original solution, to design it and then to characterize the prototype. The research program involves other academic partners, which allows the post-doctoral student to immerse himself in an upstream research context. An industrial application has been identified. The post-doctoral student will be encouraged to enrich the subject with additional functions in the control (regulation) at very high frequency, the transmission of isolated signals via the converter or any other proposals.
Active medical implants encapsulated using hermetic glass package
Microelectronics extends its range of applications via the micro-systems with high level of integration including sensors, energy scavenger, and communication modules. Medical implants such as pacemakers and defibrillators medical implants, drug dispensers, intra-cranial probes are many possible applications for these modules. The use of glass offers a wide field of investigation. Moreover, recent innovations for the glass material (interconnections, thinning, and functionalization) reinforce its relevance to the medical field: biocompatibility, stability, transparency, and potentially lower cost.
The objective of this work is to design and validate technological steps to integrate high level of microsystems encapsulated in glass material.
Ge-on-Insulator (GeOI) substrates for photonics
The induction of tensile strain in intrinsic and doped Germanium (Ge) is one approach currently explored to transform the Ge indirect bandgap into a direct one. To take full advantage of Ge, we study the Ge CMOS photonics platform with Ge-on-Insulator (GeOI) structure, which enables strong 2D optical confinement in the Ge photonic-wire devices. One recent study in our lab showed the interest of a method of incorporation of mechanical stress into Ge, one of the essential ingredients of the laser. In particular, the method could be applied to the massive Ge, making compatible gap direct and crystalline quality.
Post-doc objectives : Development of GeOI substrates from massive Ge donors with tensile strain inside the Ge film. These developments will be realized from the existing Smart Cut / thinning processes, combined with technological steps to overcome their current limits (SAB bonding). The substrates obtained will be characterized to determine their state of deformation as well as their damage (Raman / XRD) and final GeOI substrates will be provided to the application laboratories for the production of photonic components.
Contribution to the development of miniature antennas measuring devices
The generalization of RF links operating at VUHFfrequencies to equip an increasing number of communicating electronic devices helps to intensify research on miniaturization and integration of antennas. As a result, significant progress are regularly carried out to reduce the size of antennas and it is not uncommon to find work describing antenna structures of 1/30 of the wavelength maximum dimension. Increased sensitivity to the operating environment is observable with electrically small antennas. This feature is reflected by problems of measurement of electrical and radiation properties that may be altered with the standard techniques of connecting a measuring cable to the antenna. Accordingly, the subject seeks to develop techniques for electrically small antennas charterization using non-invasive methods, that is to say does not interfere (or few) under test antenna. Two techniques will be investigated based on the work already done in the laboratory. The first technique is based on the far field electromagnetic reflectometry. The second technique involves the use of an RF-optical transducer in the vicinity of the antenna under test for a particular design of miniature optic RF conversion reflectometer for measuring antenna impedance.
Investigation of the reliability of Resistive RAMs for high density memories application
In this postdoc, we propose to investigate Resistive memories (RRAM) as a Storage Class Memory (SCM) for high density memory applications. To this aim, both CBRAM and OXRAM will be studied and compared. RRAM technologies, integrating various resistive layers, top and bottom electrodes will be integrated.
Then electrical characterization will be performed on these different memory options. The impact of the integration flow on the memory characteristics will be addressed, to evaluate how critical integration steps may impact the memory operation. In particular, MESA (the RRAM stack is etched) vs Damascene (the RRAM stack is deposited in a cavity) approaches will be compared.
After the evaluation of the memory basic operation (forming, SET and RESET operation speed, required voltages…), a specific focus will be made on reliability. In particular, endurance will be deeply investigated and optimized. The impact of SET RESET conditions (including smart programming schemes) on the window margin and number of cycles will be analyzed. Finally, the variability issue will be highly covered, in order to quantify how cycle to cycle and device to device variability close the window margin of the RRAM. Specific reliability concerns (read noise…) will also be addressed. Extrapolations on the maximum density a given RRAM technology can reach will be drawn.
Based on this detailed study, a benchmark of all the tested RRAM technologies will be made, to identify the pros and cons of each option, and highlight the tradeoff that have to be found (among them: memory speed, endurance, operating voltages, consumption…).