The technology choice in the eco-design of AI architectures

Electronic systems have a significant environmental impact in terms of resource consumption, greenhouse gas emissions and electronic waste, all of which are experiencing a massive upward trend. A large part of the impact is due to production, and more particularly the manufacturing of integrated circuits, which is becoming more and more complex, energy-intensive and resource-intensive with new technological nodes. The technology used for the implementation of a circuit has direct effects on the environmental costs for production and use, the lifespan of the circuit and the possibilities of several life cycles in a circular economy perspective. The technological choice therefore becomes an essential step in the ecodesign phase of a circuit.
The thesis aims to integrate the exploration of different technologies into an eco-design flow of integreted circuit. The purpose of the work is to define a methodology for a systematic integration of the technological choice into the flow, with identification of the best configuration of the architecture implemented for maximizing the lifespan and taking into account the strategies of circular economy. The architectures targeted by the thesis fall into the field of embedded AI, which is experiencing an upward deployment trend and involves major societal challenges. The thesis will constitute a first step in research towards sustainable embedded AI.

Software and hardware acceleration of Neural Fields in autonomous robotics

Since 2020, Neural Radiance Fields, or NeRFs, have been the focus of intense interest in the scientific community for their ability to implicitly reconstruct 3D and synthesize new points of view of a scene from a limited set of images. Recent scientific advances have drastically improved initial performance (reduction in data requirements, memory needs and processing speed), paving the way for new uses of these networks, particularly in embedded applications, or for new purposes.
This thesis therefore focuses on the use of these networks for autonomous robotic navigation, with the embedded constraints involved: power consumption, limited computing and memorization hardware resources, etc. The navigation context will involve extending work already underway on incremental versions of these neural networks.
The student will be in charge of proposing and designing innovative algorithmic, software and hardware mechanisms enabling the execution of NeRFs in real time for autonomous robotic navigation.

Study of co-integrated TeraHertz source arrays in Silicon and III-V photonics technology

TeraHertz (THz) radiation is of growing interest for imaging and spectroscopy in various application fields such as safety, health, environment and industrial control, since in this frequency range many dielectric materials are transparent and many molecules present unique spectral signatures for their identification. However, the limitations of the current sources, required for this active Imaging, hinder its use over long distances or through thick materials.

This thesis proposes to develop a widely tunable THz power source in the form of an array of photoconductor sources excited by photomixing two infrared lasers. The aim is to integrate several dozen or even hundreds of sources on a single component, by co-integrating components made of III-V materials on a silicon photonic substrate, in order to offer an innovative solution to power and tunability problems.

This thesis work, shared between the Bordeaux and Grenoble sites, is positioned in fields with strong industrial potential: integrated photonics and silicon integration technologies. Several items will be addressed , including the study of the architecture of the complete photonic system using simulation tools, the choice of structures and materials, technological development on CEA LETI platforms, and performance characterization. A proof-of-concept with a small number of sources is planned, followed by the design of a large-scale matrix system.

The project represents a major technological challenge, but its success would pave the way for a significant improvement in the penetration capacity of THz radiation, and would also contribute to the broadening of THz application fields.

Development of integrated superconducting nanowire single photon detectors on silicon for photonic quantum computing

The development of quantum technologies represents a major challenge for the future of our society, in particular to build unhackable communications as well as quantum computers offering computing power well beyond that available with current supercomputers. Photonic quantum bits (or qubits), in the form of single photons, are robust against quantum decoherence and are therefore very attractive for these applications. At CEA-LETI, we are developping an integrated quantum photonics technology on silicon wafers, compatible with industrialization, comprising key building blocks for qubit generation, manipulation and detection on-chip.
The PhD project will be focused on the development of integrated superconducting nanowire single photon detectors, sensitive to the presence of a single photon, required for photonic quantum computing. The objective will be the design of superconducting single photon detectors integrated with ultra-low loss waveguides used for the core of the quantum computing processor, the development of a clean room fabrication process compatible with the existing silicon photonics platform and the characterization of the detector figures of merit (detection efficiency, dark count rate, timing performances) using attenuated lasers. The final goal of the PhD will be the integration of small circuits including several detectors on-chip to characterize the purity and indistinguishability of single photons emitted by a quantum dot source developped in parallel at CEA-IRIG (also located in Grenoble).
This PhD work will be carried out in collaboration between CEA-LETI and CEA-IRIG and will be a strategic cornerstone at the heart of future generations of quantum photonic processors featuring several tens of qubits.

Linearisation of optical micro-sources for communications

Would you like to play a part in the future of optical transmission for high-speed communications? This PhD will play a key role, focusing on performance and energy efficiency, with a particular focus on encouraging the emergence of optical solutions with low carbon costs and low dependence on rare materials.
The field of non-coherent optical communications on LEDs has been booming in recent years, notably due to the advantages that GaN and organic microLEDs can bring in terms of high data rate ([1-2],, energy efficiency and hybrid integration for recent and varied applications such as LiFi, communications on fibre (data centres, etc.) or on waveguide (chip-to-chip). However, on one hand these sources require delicate optimisation of the waveform parameters due to their multi-factorial and complex frequency behaviour, and on the other hand they impose non-linearities and memory effects that limit performance and can be similar to the phenomena introduced by power amplifiers in conventional RF systems, albeit with their own specific features. Over the last ten years or so, studies have attempted to compensate for these non-linearities by using models with different trade-offs between complexity and modelling accuracy, with validations on commercial macro-LEDs. In addition, microLEDs such as those developed at the CEA ( have recently come to the fore in certain areas of research, thanks to their high bandwidth and high integration, but with specific HF behaviour and memory effects increased by a modulation band exceeding one gigahertz.
The thesis will first study solutions for optimising the configuration of multicarrier waveforms based on the specific characteristics of optical microsources (inverse dependence of efficiency and bandwidth on polarisation). Secondly, non-linearity compensation algorithms will be implemented on this type of optical source in an attempt to improve transmission rates or distances, based on complexity/performance trade-offs. Hardware validations of the digital solutions developed will be carried out on micro-sources implemented in instrumented transmission benches, enabling a real-time demonstration of the innovations produced during the thesis.
You will be part of a dynamic team working on a wide range of research topics relating to signal processing, protocols and implementation platforms. We are looking for a candidate with a background in digital communications, signal processing and optoelectronics, who is genuinely motivated to work on a multidisciplinary subject (waveforms, algorithms, modelling, simulations and hardware implementation).
We will offer you a unique research environment dedicated to ambitious projects that address today's major societal challenges, experience at the cutting edge of innovation (strong potential for industrial development) and exceptional experimental resources, leading to real career opportunities in R&D at the end of your thesis.
Come and join us, develop your skills and acquire new ones! To apply, please email your CV directly to

[1] M. N. Munshi, L. Maret, B. Racine, A. P. A. Fischer, M. Chakaroun and N. Loganathan, "2.85-Gb/s Organic Light Communication With a 459-MHz Micro-OLED," in IEEE Photonics Technology Letters, vol. 35, no. 24, pp. 1399-1402, 15 Dec.15, 2023, doi: 10.1109/LPT.2023.3327612.
[2] L. Maret et al., « Ultra-High Speed Optical Wireless Communications with gallium-nitride microLED », Photonics West, SPIE OPTO, Light-Emiting Devices, Materials and Application 2021

Robustness of thick metallizations made on 3D ceramic substrates.

A robust and high quality metallization of 3D ceramic substrates is a key element of the success of this project and a necessity for a future industrial development of the research work that will be carried out during these two theses.
The work in progress on the material platform of the CEA of Toulouse already provides interesting results which allow to consider the first subject proposed here. However, during this work, we could highlight that a joint work between the material and power teams allows to improve the quality of the results by integrating the design for reliability aspect to the material. This is why, this second subject aims to treat in detail the realization of 3D metallized ceramic parts, in order to understand the evolution of the performances of the parts made according to the ceramics used, the metallization techniques, the nature of the metals, the designs, the processes... used.
Also, this thesis work will begin with the realization of flat ceramic structures on which will be carried out tests of metallization by using various techniques such as brazing of tracks, the deposit of layers of adhesion followed by electroplating, ...
These different techniques and interfaces will be subjected to aging and mechanical tests. In addition, morphological characterizations will be performed. The quality of the interfaces can also be evaluated by means of dielectric characterizations (measurement of dielectric rigidity, dielectric losses, I(V)).
Specimens will also be made to verify the mechanical, dielectric and thermal characteristics of the ceramic, which will provide the first thesis topic with material data.
Moreover, during the whole thesis, test vehicles will be realized in order to define the design rules to be used for the dimensioning of the power module.
Finally, 3D metallized ceramic parts will be realized and characterized in order to allow the realization of the power module defined in the first subject of thesis.

Electrothermal optimization of Wide band gap power modules by functionalization of 3D ceramic substrates made by 3D ceramic printing (Al2O3/AlN)

In order to take advantage of Wide band gap components (GaN and SiC), it has been demonstrated that it is necessary to reduce the parasitic elements in the switching cells and therefore in the power modules. The 'trivial' solution is to make the power modules more compact to solve this problem of parasitic elements. However, this is often done at the expense of thermal performance. The subject proposed here has therefore the ambition to not neglect any of these aspects by taking advantage of the new freedoms offered by ceramic 3D printing in terms of design and performance.
Also, this thesis will start with a study of current wide band gap power modules, which will allow the PhD student to complete his knowledge and to understand the limits of these architectures: parasitic elements, parallelizations, signal integrity, thermal management, partial discharges ...
From this first assessment, which is intended to be as exhaustive as possible, we propose to use 3D FEM simulation to find a set of topologies that can be produced by 3D ceramic printing and that will be able to respond to the problems identified.
Based on these results, a new high voltage power module (800V-400A) can then be designed and built.

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Spintronics-based non-volatile FPGA development for space applications

In microelectronics, we can distinguish between two types of integrated circuit. ASICs (Application Specific Integrated Circuits) dedicated to only one application and FPGAs (Field Programmable Gate Arrays) dedicated to digital electronics, on which we focus in this thesis. The main advantage of FPGAs is that they can be reprogrammed. These circuits are made up of several elementary logic cells, interconnected via a programmable interconnect system. This makes them particularly sensitive to radiation, since a fault in the memory permanently alters the operation of the FPGA. Traditional FPGAs are based on SRAM or Flash memories. The aim of this thesis is to evaluate the use of MRAM as a configuration and interconnect memory for FPGAs, and in particular as a means of improving/simplifying the implementation of standard hardening techniques for space applications, while reducing cost thanks to its density. The work will involve inserting multi-level magnetic components known as magnetic tunnel junctions, and assessing their value. To do this, we'll be using several simulation tools to inject particles present in space at different points in the circuit, and compare the results with a conventional version. In this way, it will be possible to measure the effectiveness of such a hardening process based on magnetic technology.

MEMS chaotic motion for high sensitivity

Improving the resolution of MEMS sensors always means increasing the cost of the component (surface area) or his electronics (complexity and power consumption). In view of the current challenges of energy sobriety, it is essential to explore new disruptive ways to reduce the impact of high-performance sensors.
Chaos is a deterministic phenomenon exponentially sensitive to small variations. Little studied until recently, it can be simply implemented in the dynamics of MEMS sensors, to amplify weak signals and increase resolution.
Ultimately, this is an "in-sensor computing" method, making it possible to do away with some of the measurement electronics.
The aim of this thesis is to create the first MEMS demonstrator for in-sensor computing in the chaotic regime. To achieve this, we propose to study, through in-depth characterization/modeling work, this new operating regime on MEMS sensors already available at DCOS/LICA (M&NEMS and MUT beams). These first steps in understanding the link between measurand and MEMS response in the chaotic regime will enable us to move on to other applications, notably in the field of cryptography.

Electrical characteization and Reliability of NextGeN FDSOI MOSFETs

Global demand on semiconductor solutions (device, circuit, system) has skyrocketed during the last few years, especially in reliation with COVID worldwide crisis. This industry has revealed its significance in the present world has well as its weaknesses. The European council decided to launch an ambisious program called 'Chip Act' to develop a solid semiconductor european industries network based on its champions such as ST microelectronics, SOITEC and the CEA-LETI. In France, the french government decided to push forward the FDSOI technology using the CEA-LETI to develop the 10nm node and beyond.
The reach the MOSFET expected performance of such an aggressive node, several original technological solutions are considered, such as the use of Si-channel stressors to boost the mobility and the ON state current or the use of thinned Si channel film and gate oxide. The influence of these novel processes and technological bricks on MOSFET FoM and reliability must be carefully studied before entering in a production mode. The PhD student will address the electrical characterization of the High-k/Metal Gate stacks (initial performance) and their long term reliability (aging under stress). Electrical modeling of the experimental data will be used to determine the crucial parameters to improve and give quick feedback to the Device development Lab.