PRObablistic on-edge learning for SPINtronic-based neuromorphic systems

The hired joint UGA – KIT PHD candidate should be able to cover the work of the workpackage 1 and 2. He/she will also participate to technical meetings and have a good understanding on how the tasks of the other technical workpackages are executed, mainly by the partners with internal effort. As a whole, the PHD candidate will develop and optimize compact Computing in Memory architectures, provide high level models for further integration in large scale designs, perform validation of all proofs of concepts of new architectural implementations. He/she will be involved also in the design of algorithmic implementations of Bayesian Neural Networks adapted to the architecture. More in details, he/she will work on the following directions:
Design and optimization of the probabilistic neural networks, will be executed mostly in SPINTEC Laboratory in Grenoble, that will include:
1. full design stack of hardware accelerator without selector transistor for frequent Read and Write operations.
2. Design and validate an innovative architectural approach able to compensate for sneaky paths phenomena.
3. High-level modeling of the full crossbar architecture that includes the stochastic component.
4. Propose a full simulation and validation flow scalable to scaled to realistic architecture size and parameters that implement Bayesian tasks.
5. Perform Delay, power consumption and area overhead figures of merit