development of capacitive IIIV-Silicon modulators for emerging applications in silicon photonics
The proposed thesis work consists in developing phase modulators based on the integration of IIIV-Silicon hybrid capacitors in silicon waveguides, at a wavelength of 1.55µm to meet the emerging demands of photonics (optical computing on chip, LIDAR). Unlike telecom/datacom applications, which have enabled the emergence of integrated silicon photonics, these new application fields involve circuits that require a very large number of phase modulators. All-silicon modulators based on PN junctions, which have optical losses of several dB and centimeter sizes, are a bottleneck to the emergence of these applications.
IIIV-Si hybrid capacitors can allow, thanks to the electro-optical properties of IIIV materials, to reduce the size of silicon modulators by an order of magnitude and improve their energy efficiency (reduction of optical losses). First functional modulators have been designed, fabricated and tested. The first step will be to study in details their performance (losses, efficiency, speed, hysteresis) and to understand their limitations, using the available photonic simulation tools and electrical characterization methods (C(V), interface charge density, DLTS, etc.). In particular, this will involve better understanding the impact of the manufacturing process on the electro-optical properties. In a second step, the doctoral student will propose improvements to the designs and manufacturing processes (in collaboration with our microfabrication specialists), and will validate them experimentally using hybrid capacities and modulators integrating these capacities.
Increasing the electrothermal robustness of new SiC devices
Silicon Carbide (SiC) is a semiconductor with superior intrinsic properties than Silicon for high temperature and high power electronics applications. SiC devices are expected to be extensively used in the electrification transition and novel energy management applications. To fully exploit the SiC superior properties, the future semiconductor devices will be used under extreme biasing and temperature conditions. These devices must operate safely at higher current densities, higher dV/dt and higher junction temperatures than Si devices does.
The objective of this thesis is to study the SiC devices fabricated at LETI under these extreme operating conditions, and to optimize their design to fully use the theoretical potential of SiC. The thesis work will include several phases that will be strongly coupled:
- Advanced electro-thermal characterisation (50%), by proposing new approaches to testing components in a box or on a suitable support, using artificial intelligence (AI) tools for data extraction and processing. The work will include adapting standard measurement methodologies to the specific switching characteristics of SiC.
- An assessment (15%) of the design and technological parameters responsible for the operating limits of the components.
- A physico-chemical characterisation component (15%) to analyse failures under these extreme conditions.
- The inclusion of predictive models (20%) for the sensitivity of architectures to extreme conditions and faults, based on modelling.
RF Circuit Design for Zero Energy Communication
Our ambition for 6G communication is to drastically reduce the Energy in IoT. For that purpose we aim at developing an integrated circuit enabling zero Energy communication.
The objective of this PhD is to design this circuit in FD-SOI and operating in the 2.4 GHz. In this PhD, we propose to use a new design technique which is currently revolutionizing the radio-frequency design. We expect that many innovations can be carried out during this PhD by combining those two innovations.
The candidate will integrate a large design team and he will participate in collaborative project at european level. As a first step, he will analyze the system constraints to choose the best architecture and derive the specifications. Then, he will formalize mathematically the performances of the backscattering technique in order to setup a design methodology. Then he will be working full time on circuit design, sending to fabrication two circuits in 22 um technology. He will be also involve in the test of the circuit as well as in the preparation of a demonstrator of the backscattering techniques. We expect to publish several papers in high level conferences.
Advanced RF circuit design in a system and technology co-optimization approach
This thesis addresses the two major challenges facing Europe today in terms of integrating the communication systems of the future. The aim is to design RF integrated circuits using 22nm FDSOI technology in the frequency bands dedicated to 6G, which will not only increase data rates but also reduce the carbon footprint of telecoms networks. At the same time, it is essential to consider the evolution of silicon technologies that could improve the energy efficiency and effectiveness of these circuits. This work will be carried out with an eye to the design methodology of radio frequency systems.
Within the framework of the thesis, the objective will be broken down into three phases. Firstly, simulation tools will be developed to predict the performance of Leti's future 10nm FDSOI technology. The second stage will involve identifying the most relevant architectures available in the literature for the application areas envisaged for the technology. A link with upstream telecoms projects will be systematically established to ensure that the candidate understands the systems' challenges.
Finally, in order to validate the concepts developed, the design of an LNA and a VCO as part of an ongoing project in the laboratory will be proposed.
The candidate will join a large team that works on new communication systems and addresses aspects of architectural study, modeling and design of integrated circuits. The candidate must have serious skills in the design of integrated circuits and radio frequency systems as well as good ability to work in a team.
Scalable thermodynamic computing architectures
Large-scale optimisation problems are increasingly prevalent in industries such as finance, materials development, logistics and artificial intelligence. These algorithms are typically realised on hardware solutions comprising clusters of CPUs and GPUs. However, at scale, this can quickly translate into latencies, energies and financial costs that are not sustainable. Thermodynamic computing is a new computing paradigm in which analogue components are coupled together in a physical network. It promises extremely efficient implementations of algorithms such as simulated annealing, stochastic gradient descent and Markov chain Monte Carlo using the intrinsic physics of the system. However, no clear vision of how a realistic programmable and scalable thermodynamic computer exists. It is this ambitious challenge that will be addressed in this PhD topic. Aspects ranging from the development computing macroblocks, their partitioning and interfacing to a digital system to the adaptation and compilation of algorithms to thermodynamic hardware may be considered. Particular emphasis will be put on understanding the trade-offs required to maximise the scalability and programmability of thermodynamic computers on large-scale optimisation benchmarks and their comparison to implementations on conventional digital hardware.
Study and evaluation of silicon technology capacities for applications in infrared bolometry
Microbolometers currently represent the dominant technology for the realization of uncooled infrared thermal detectors. These detectors are commonly used in the fields of thermography and surveillance. However, the microbolometer market is expected to grow explosively in the coming years, particularly with their integration into automobiles and the proliferation of connected devices. The CEA Leti LI2T, a recognized player in the field of infrared thermal detectors, has been transferring successive microbolometer technologies to the industrial partner Lynred for over 20 years. To remain competitive in this growing market for microbolometers, the laboratory is working on breakthrough microbolometers incorporating CMOS components as the sensitive element. In this context, the laboratory has initiated studies focusing on temperature-dependent silicon technology capabilities, with promising initial results not reported in the literature. The thesis topic fits into this context and aims to demonstrate the interest of these components for microbolometric applications. It will therefore cover the analytical modeling of these components and their associated physical effects, as well as the reading of such a component in a microbolometer imager approach. A reflection on technological integration will also be conducted. The student will benefit from several already realized technological lots to experimentally characterize the physical effects and familiarize themselves with the subject. To understand the encountered phenomena, the student will have access to the laboratory's entire test set-ups (semiconductor parameter tester, noise analyzer, optical bench, etc.) as well as the numerical analysis Tools (Matlab/Python, TCAD simulations, SPICE simulations, Comsol, etc.). By the end of the thesis, the student will be able to address the question of the interest of these components for microbolometric applications.
Optimisation of advanced mask design for sub-micrometer 3D lithography
With the advancement of opto-electronic technology, 3D patterns with sub micrometer dimensions are more and more integrated in the device, especially on imaging and AR/VR systems. To fabricate such 3D structures using standard lithography technique requires numerous process steps: multiple lithography and pattern transfer, which is time and resource consuming.
With optical grayscale lithography, such 3D structures can be fabricated in single lithography step, therefore reducing significantly the number of process steps required in standard lithography. For high volume manufacturing of such 3D patterns, optical grayscale lithography with Deep-UV (DUV), 248nm and 193nm are the most relevant, as it is compatible with industrial production line. This technique of 3D lithography is however more complex than it seems, which requires advance lithography model and data-preparation flow to design optical mask corresponding to the desired 3D pattern.
Design and fabrication of neuromorphic circuit based on lithium-iontronics devices
Neural Networks (NNs) are inspired by the brain’s computational and communication processes to efficiently address tasks such as data analytics, real time adaptive signal processing, and biological system modelling. However, hardware limitations are currently the primary obstacle to widespread adoption. To address this, a new type of circuit architecture called "neuromorphic circuit" is emerging. These circuits mimic neuron behaviour by incorporating high parallelism, adaptable connectivity, and in memory computation. Ion gated transistors have been extensively studied for their potential to function as artificial neurons and synapses. Even if these emerging devices exhibit excellent properties due to their ultra low power consumption and analog switching capabilities, they still need to be validated into larger systems.
At the RF and Energy Components Laboratory of CEA-Leti, we are developing new lithium-gated transistors as building blocks for deploying low-power artificial neural networks. After an initial optimization phase focused on materials and design, we are ready to accelerate the pace of development. These devices now need to be integrated into a real system to assess their actual performance and potential. In particular, both bio-inspired circuits and crossbar architectures for accelerated computation will be targeted.
During this 3-year PhD thesis, your (main) objective will be to design, implement, and test neural networks based on lithium-gated transistor crossbars (5x5, 10x10, 20x20) and neuromorphic circuits , along with the CMOS read and write logic to control them. The networks might be implemented using different algorithms and architectures, including Artificial Neural Network, Spiking Neural Networks and Recurrent Neural Networks, which will be then tested by solving spatial and/or temporal pattern recognition problems and reproduce biological functions such as pavlovian conditioning.
Embedded local blockchain on secure physical devices
The blockchain is based on a consensus protocol, the aim of which is to share and replicate ordered data between peers in a distributed network. The protocol stack, embedded in the network's peer devices, relies on a proof mechanism that certifies the timestamp and ensures a degree of fairness within the network.
The consensus protocols used in the blockchains deployed today are not suitable for embedded systems, as they require too many communication and/or computing resources for the proof. A number of research projects, such as IOTA and HashGraph, deal with this subject and will be analysed in the state of the art.
The aim of this thesis is to build a consensus protocol that is frugal in terms of communications and computing resources, and whose protocol stack will be implemented in a secure embedded device. This protocol must be based on the proof of elapsed time from our laboratory's work, which is also frugal, called Proof-of-Hardware-Time (PoHT), and must satisfy the properties of finality and fairness. The complete architecture of a peer node in the network will be designed and embedded on an electronic board including a microprocessor and several hardware security components, in such a way that the proof resource cannot be parallelized. Communication between peers will be established in a distributed manner.