High-Endurance Chalcogenide Memories for Next-Generation AI
Discover a unique phd opportunity where you will dive into the heart of innovation in memory technologies. You will develop strong expertise in areas such as electrical characterization and the understanding of degradation phenomena in chalcogenide-based memories.
By joining our multidisciplinary teams, you will play a key role in studying and improving the endurance of Phase-Change Memory (PCM) and Threshold Change Memory (TCM) devices—two promising technologies for high-performance artificial intelligence applications. You will take part in innovative projects combining scientific rigor and applied research on nanoscale devices, working closely with another CEA PhD student who conducts advanced physico-chemical analyses (TEM) to investigate degradation mechanisms.
You will have the opportunity to contribute actively to tasks such as:
Electrical characterization of PCM and TCM devices to analyze cycling-induced degradation
Development and evaluation of innovative programming protocols to extend endurance limits
Proposing solutions to improve the reliability and performance of next-generation memories
Regular collaboration and discussion with the CEA PhD student to interpret TEM results and draw conclusions about degradation mechanisms
Selective deposition of oxides by ALD
For next-generation microelectronics, Area Selective Deposition (ASD)is a promising approach to simplify integration schemes for the most advanced technology nodes. These ASD approaches need to be adapted according to a trio comprising the material to be deposited, the growth surface, and the inhibited surface.
This PhD focuses on the area selective deposition of oxides (such as SiO2, Al2O3, …) on Si or SiO2 and not on silicon nitride (SiN), which is one of the most complex topics in ASD, and aims to evaluate the relevance of this type of process for simplifying the integration and the fabrication of advanced FDSOI transistors.
To develop this selective oxide deposition process, various approaches aiming at making SiN an inhibitor of the Atomic Layer Deposition (ALD) will be explored (plasma treatments, Small Molecular Inhibitors, combination of both, etc.). Dedicated surface characterizations will be carried out in order to better understand the mechanisms of inhibition at the origin of the selective deposition and allowing to achieve high selectivity for oxide thicknesses of 10 nm and above.
This PhD project will take place at CEA-LETI, within the advanced materials deposition department, in collaboration with LMI UMR 5615 CNRS/UCBLyon. The student will have access to the CEA-LETI 300 mm cleanroom fabrication platforms for thin film deposition by PEALD, the CEA nanocharacterization platform and gas-phase surface functionalization at LMI. Surface analyses and thin film characterizations (ellipsometry, XRR, AFM, FTIR, contact angle, SEM, XPS, ToF-SIMS) will be used to determine the best selectivity and understand the physico-chemical mechanisms.
Study of Failure Modes and Mechanisms in RF Switches Based on Phase-Change Materials
Switches based on phase change materials (PCM) demonstrate excellent RF performance (FOM <10fs) and can be co-integrated into the BEOL of CMOS processes. However, their reliability is still very little studied today. Failure modes such as heater breakage, segregation, or the appearance of cavities in the material are shown during endurance tests, but the mechanisms of these failures are not discussed. The objective of this thesis will therefore be to study the failure modes and mechanisms for different operating conditions (endurance, hold, power). The analysis will be carried out through electrical and physical characterizations and accelerated aging methods will be implemented.
Next-Gen Surface Analysis for Ultrathin Functional Materials
Advanced nanoelectronics and quantum devices rely on ultrathin oxides and engineered interfaces whose chemical composition, stoichiometry and thickness must be controlled with sub-nanometer precision. LETI is installing the first 300-mm multi-energy XPS–HAXPES tool with angle-resolved capability, enabling quasi in situ chemical metrology from deposition to characterization.
This PhD will develop quantitative, multi-energy and angle-resolved XPS/HAXPES methodologies for ultrathin oxides and oxynitrides, validate measurement accuracy, and establish robust protocols for quasi in situ transfer of sensitive layers. Applications include advanced CMOS stacks and quantum Josephson junctions, where sub-2 nm AlOx barriers critically determine device performance.
The project directly supports the development of next-generation quantum technologies, advanced photonics and energy-efficient microelectronics by improving the reliability and stability of nanoscale materials. The work will be carried out within a strong multi-partner framework.
Reducing damage and loading in high aspect ratio III-V etching
The growing demand for III-V semiconductors in high-efficiency photovoltaics, quantum photonics, and advanced imaging technologies requires innovative and cost-effective fabrication methods. This PhD project focuses on developing plasma etching processes for In-based III-V semiconductors to produce high aspect ratio (HAR) structures on large wafers from 100 to 300 mm. The research addresses two key challenges: understanding how etching process windows evolve with material loading and process conditions (physical vs. chemical dominance), and minimizing electrical degradation induced by HAR etching, which is critical for device performance.
These challenges are fundamentally linked to the low volatility of In-based etch byproducts, the need to balance kinetic and thermal energy inputs to enhance etch selectivity, and the management of etch loading effects for large-scale production. The experimental approach will leverage CEA-Leti's state-of-the-art facilities, including the Photonics platform for 2–4-inch wafer processing, which enables masking strategies (hard mask deposition, photolithography) and low-temperature (150°C) etching.
Characterization will involve SEM for etch profile analysis, XPS for surface composition, and TEM-EDX for sidewall quality assessment. Damage evaluation will be performed using near-infrared photoluminescence decay to measure minority carrier lifetime and identify recombination centers. The work aims to develop optimized HAR etching processes (aspect ratios >10, critical dimensions <1 µm) for In-based III-V materials, investigate pulsed plasma techniques to reduce etch-induced damage, and provide insights into defect formation mechanisms to guide process optimization for industrial applications.
Introduction of innovative materials for sub-10nm contact realization
As part of the FAMES project and the European ChipACT initiative, which aim to ensure France’s and Europe’s sovereignty and competitiveness in the field of electronic nano-components, CEA-LETI has launched the design of new FD-SOI chips. Among the various modules being developed, the fabrication of electrical contacts is one of the most critical modules in the success of advanced node development.
For sub-10 nm node, the contact realization is facing a lot of challenges like punchthrough (due to low etch selectivity during contact etching), voids during metal deposition, self-alignment, and parasitic capacitance. New breakthrough approach has recently been proposed consisting in the deposition of new dielectric films with chemical gradient. This thesis focuses on the development (deposition an etching processes) of new gradient compounds incorporated into SiO2 to address the current issues.
Advanced electrode materials by ALD for ionic devices
This work aims to develop Advanced ultrathin cunductive layers (<10nm) by ALD (Atomic Layer Deposition)for électrodes use(resistivity 100). The other challenge aims to reduce the ALD-based electrode layer thickness less than 5nm while still maintaining the advanced electric properties (resistivity in the mOhm range).
This work covers multiple aspects including inter alia ALD process, ALD precursors, Elementary characterization of intrinsec properties (physico-chemical, morphological and electrochemical) as well as integration on short loop 3D devices.
Superconducting silicide contacts on hyperdoped silicon by nanosecond pulsed-laser annealing
In the race towards building a quantum computer, there is a deep interest in fabricating devices based on the robust and scalable silicon FD-SOI technology. One example is the Josephson Field Effect Transistor (JoFET) whose operability relies on the high transparency of the interface between the superconducting source/drain regions and the semiconducting channel. Such transparency could be improved by doping the source/drain regions, and hence lowering the Schottky barrier height at the superconductor/semiconductor interfaces.
This PhD aims at developing highly transparent superconducting silicide contacts on a 300 mm production line using Nanosecond Pulsed Laser Annealing (NPLA). NPLA will play a key role for reaching extremely high doping concentrations in silicon [1,2], then forming the superconducting silicides (CoSi2, V3Si) with minimal thermal budget and related dopant deactivation. A particular focus will be devoted on the stresses during silicide formation and their impact on the superconducting critical temperature. Also, the distribution of dopants will be assessed by Atom Probe Tomography (APT), an advanced 3D imaging technique capable of imaging the distribution of dopants at the atomic scale [3]. Finally, electrical measurements on fabricated junctions and transistors will be carried out at low temperature (< 1 K) in order to evaluate the transparency of the superconducting contacts.
New generation of organic susbtrates for power conversion
Recent advances in electric motors and associated power electronics have led to a significant increase in power density requirements. This increase in power density means smaller heat exchange surfaces, which amplifies the challenges associated with dissipating the heat generated by power electronics components during operation. In fact, the lack of adequate heat dissipation causes electronic components to overheat, impacting their performance, durability, and reliability. Other issues related to cost, repairability, and thermomechanical constraints call into question traditional ceramic-based insulating thermal interfaces. It is therefore imperative to develop a new generation of heat-dissipating materials that take the system environment into account.
The objective of this thesis is to replace the ceramic substrate in power module systems, whose main role is to act as the system's dielectric layer, with a thermally conductive organic matrix composite. The current substrate has well-known limitations (fragility, poor interface, cycling limit, cost). The organic substrate must have the highest possible thermal conductivity (>3 W/m.k) in order to dissipate the heat emitted properly, while also being electrically insulating with a breakdown voltage of approximately 3kV/mm. It must also have a coefficient of thermal expansion (CTE) compatible with that of copper in order to eliminate delamination phenomena during the cycling undergone by the device during its lifetime. The innovation of the doctoral student's work will lie in the use of highly thermally conductive (nano)fillers that will be electrically insulated (insulating coating) and can be oriented in a polymer resin under external stimulus.
The development of the electrical insulating shell on the thermally conductive core will be carried out using the sol-gel method. The synthesis will be controlled and optimized in order to correlate the homogeneity and thickness of the coating with the dielectric and thermal performance of the (nano)composite. The charge/matrix interface (a potential source of phonon diffraction) will also be studied. A second part will focus on grafting magnetic nanoparticles (MNPs) onto thermally conductive (nano)fillers. Commercial MNPs will be evaluated (depending on requirements, grades synthesized in the laboratory may also be evaluated). The (nano)composites must have rheology compatible with pressing and/or injection processes.
Effect of gamma-ray irradiation on ferroelectric, hafnia-based, non-volatile memory for use in extreme environments
The emergence of hafnia-based ferroelectric (FE) memories has opened a new paradigm for ultra-low-power edge computing. Hafnia is fully compatible with CMOS technology and is ultra low-power—three orders of magnitude less than other emerging memory technologies.
These advantages align with strategic applications in space, defense, medical, nuclear safety, and heavy-duty transport, where electronics face harsh radiation environments.
Imprint induces a shift of the Polarization-Voltage (P-V) curve along the voltage axis and is attributed to charge trapping/detrapping, domain pinning and charged defects. All may be accentuated under irradiation.
The project will use advanced photoelectron spectroscopy techniques including synchrotron radiation induced Hard X-ray photoelectron spectroscopy and complementary structural analysis including high-resolution electron microscopy, X-ray diffraction and near field microscopy. The experimental characterization will be accompanied by theoretical calculations to simulate the material response to irradiation
The work will be carried out in the framework of close collaboration between the CEA/Leti in Grenoble providing the samples, integrated devices and wafer scale characterization and the CEA/Iramis in Saclay for the fundamental analysis of the material properties, irradiation experiments and device scale characterizations.