Conception and integration of microlasers within a silicon photonics platform
For about ten years, the continuous increase in internet traffic has pushed the electrical interconnections of data centers to their limits in terms of bandwidth, density, and consumption. By replacing these electrical links with optical fibers and integrating all the necessary optical functions on a chip to create transmitters-receivers (transceivers), silicon photonics represents a unique opportunity to address these issues. The integration of a light source within a photonic chip is an essential building block for the development of this technology. While many demonstrations rely on the use of external lasers or bonded laser chips, it is the direct heterogeneous fabrication of a laser within the photonic chip that would allow the desired level of performance while limiting costs.
The objective of this thesis is to provide an innovative solution for the management of very short-distance communications (inter-chip, intra-chip) by realizing, on silicon, III-V membrane microlaserswith buried heterostructures. This type of microlasermeets the numerous challenges of very short-distance links thanks to an efficiency/integrabilitycompromise superior to the state of the art of datacomlasers while being compatible with CMOS fabrication lines.
Based on the work carried out during a previous thesis, the PhD student will be responsible for (i) designing the microlasersusing the available digital simulation tools in the laboratory, then (ii) manufacturing these microlasersby relying on the technological platforms of CEA-LETI, and finally (iii) electro-optically characterizing the components. This thesis work will be carried out in collaboration between CEA-LETI and LTM/CNRS and will constitute a strategic brick necessary for future generations of photonic transceivers.
Device for light extraction through evanescent coupling in Photonic Integrated Circuit
The objective of the PhD is to develop a new class of optical devices used to provide interfaces between Photonics Integrated Circuits (PICs) and free space optics. These devices have been investigated in a seminal work conveyed in a former PhD work. It consists in the use of a nanoimprinted prismatic structure bonded on the surface of a PIC. Through evanescent coupling and reflections in the structure, guided waves can be transferred from the PIC toward an external optical system. With the use of electro-optic materials, this extractor may offer interesting applications as a switchable extractor.
The candidate will delve into the theory of the device to improve its performance. He/she will perform experiments on packaging, holography and PIC characterization. His/her objective will be to manufacture a large panel of sample devices to be tested. One particular concern is to evaluate the behavior of the fabricated devices in a large spectral domain form visible to short Infra-Red wavelengths.
The candidate will use FDTD simulation software to evaluate the propagation characteristics of the wave as it travels from a confined space to a free space. He/she will define optimal prismatic structures to be replicated with nanoimprint. He/she will implement the polymer structure on PIC samples through delicate transfer and bonding protocol in a clean room. He/she will record micro-holographic optical elements with lasers to improve the angular potential of the final device. Large part of the PhD will concern the use of optical set-ups.
Low Power Image Sensor for Distributed Processing in Cameras Network
Working in a collaborative academic project, your task will be to develop a smart image sensor for a wireless camera network embedding distributed AI computing.
Current camera network contains several standard cameras that transmit their images to a global server performing the targeted inference processing. This kind of architecture proposes energy and frugality performances that are not compatible with IoT requirements.
The project goal is to tackle hardware frugality through a distributed and collaborative approach based on ultra-low-power computing nodes. Each node’s inference core will be built around ASIC processors performing calculations in analog form. The final demonstrator will consist of a wireless network of “motes” (sensor network nodes) integrating dedicated image sensors paired with hybrid processors performing analog processing.
In this context, the mote’s image sensor must extract strategic features with frugality and efficiency which implies that you have to define, design and test an innovative readout architecture of a standard imager. In collaboration with the academic partners, you will be involved in the definition of the overall mote architecture allowing to define basically the output data format and the output procedure of the imager including potential pre-processing for the distributed inference computations. The studied architecture will integrate innovative low power solutions to address the targeted IoT applications and perform both image acquisitions and AI pre-processing.
As an image sensor demonstrator is planned in this PhD Thesis, the work will be conducted at CEA-Leti in the L3i Laboratory, using professional IC design tools and software development environments.
Reducing damage and loading in high aspect ratio III-V etching
The growing demand for III-V semiconductors in high-efficiency photovoltaics, quantum photonics, and advanced imaging technologies requires innovative and cost-effective fabrication methods. This PhD project focuses on developing plasma etching processes for In-based III-V semiconductors to produce high aspect ratio (HAR) structures on large wafers from 100 to 300 mm. The research addresses two key challenges: understanding how etching process windows evolve with material loading and process conditions (physical vs. chemical dominance), and minimizing electrical degradation induced by HAR etching, which is critical for device performance.
These challenges are fundamentally linked to the low volatility of In-based etch byproducts, the need to balance kinetic and thermal energy inputs to enhance etch selectivity, and the management of etch loading effects for large-scale production. The experimental approach will leverage CEA-Leti's state-of-the-art facilities, including the Photonics platform for 2–4-inch wafer processing, which enables masking strategies (hard mask deposition, photolithography) and low-temperature (150°C) etching.
Characterization will involve SEM for etch profile analysis, XPS for surface composition, and TEM-EDX for sidewall quality assessment. Damage evaluation will be performed using near-infrared photoluminescence decay to measure minority carrier lifetime and identify recombination centers. The work aims to develop optimized HAR etching processes (aspect ratios >10, critical dimensions <1 µm) for In-based III-V materials, investigate pulsed plasma techniques to reduce etch-induced damage, and provide insights into defect formation mechanisms to guide process optimization for industrial applications.
Study of new photodiode architecture for IR imagers
In the field of high-performance infrared detection, CEA-LETI plays a leading role in the development of the HgCdTe material, which today offers such performance that it is integrated into the James Webb Space Telescope (JWST) and allows the observation and study of deep space with unparalleled precision to date. However, we believe that it is still possible to make a significant step forward in terms of detection performance. Indeed, it seems that a fully depleted structure, called a PiN photodiode, could further reduce the dark current (and thus reduce noise and gain sensitivity at low photonic flux) compared to the non-fully depleted structures currently used. This architecture would represent the ultimate photodiode and would allow either a further increase in performance at a given operating temperature or a significant increase in the operating temperature of the detector, with the potential to open new fields of application by greatly simplifying cryogenics.
Your role in this thesis work will be to contribute to the development of the ultimate photodiode for very high-performance infrared detection, characterize and simulate the PiN photodiodes in HgCdTe technology manufactured on our photonic platform.
Candidate Profile:
You hold a Master's degree in optoelectronics and/or semiconductor material physics and are passionate about applied research.
The main technical skills required are: semiconductor component physics, optoelectronics, data processing, numerical simulations, interest in experimental work to carry out characterizations in a cryogenic environment but also theoretical work to carry out numerical simulations.
The PhD student will be integrated into a multidisciplinary team ranging from the growth of II-VI materials to electro-optical characterization, including microelectronics manufacturing processes in clean rooms and the packaging issues of such objects operating at low temperature.