Cryogenic characterization of emerging memories for space and/or quantum computing applications
Low temperature computing is a new proposal to boost the technological performances beyond the frontiers in the aerospace, high performance servers, quantum computing and data center domain.
Different emerging technologies have been showing promising features at single device level during the ongoing Ph.D. work: the programmability of the OxRAMs was proved down to 4K and efforts were focused on the understanding of the interactions between the selector and the resistor composing the memory cell. FeRAMs show a better programming efficiency and stability at low temperature probably due to a crystallographic change driven by the program operation; hypothesis that lies unproved. PCM also showed a programmability down to 12K and may be included in the analysis.
Statistical behavior of R&D chip at low temperature will be the key theme of this proposition knowing that very few publications appeared in the scientific literature leaving much room for analysis and comprehension.
Throughout this Ph. D., you will gain a broad spectrum of knowledge, spanning cryogenics, microelectronics reliability and device physics. Different technologies developed in LETI will be statistically screened in this innovative scenario. Modeling of the conduction phenomena might be also considered. You will be part of a team of 7-8 people between permanent, researchers and students and you will be managed to share your work with them.
Bayesian Neural Networks with Ferroelectric Memory Field-Effect Transistors (FeMFETs)
Artificial Intelligence (AI) increasingly powers safety-critical systems that demand robust, energy-efficient computation, often in environments marked by data scarcity and uncertainty. However, conventional AI approaches struggle to quantify confidence in their predictions, making them prone to unreliable or unsafe decisions.
This thesis contributes to the emerging field of Bayesian electronics, which exploits the intrinsic randomness of novel nanodevices to perform on-device Bayesian computation. By directly encoding probability distributions at the hardware level, these devices naturally enable uncertainty estimation while reducing computational overhead compared to traditional deterministic architectures.
Previous studies have demonstrated the promise of memristors for Bayesian inference. However, their limited endurance and high programming energy pose significant obstacles for on-chip learning applications.
This thesis proposes the use of ferroelectric memory field-effect transistors (FeMFETs)—which offer nondestructive readout and high endurance—as a promising alternative for implementing Bayesian neural networks.
Field Effect Transistor with Oxide Semiconductor Channel: Multi-Level Synaptic Functions and Analog Neurons
This thrilling PhD position invites you to dive into the groundbreaking field of 2T0C (Two-Transistor, Zero-Capacitor) BEOL FET (Back-End-of-Line Field-Effect Transistor) based neurons and synapses, a revolutionary approach poised to transform neuromorphic computing. As a PhD student, you will be at the forefront of research that bridges advanced semiconductor technology with brain-inspired architectures, exploring how these innovative neuron circuits can emulate synaptic functions and enhance data processing efficiency.
Throughout this project, you will engage in hands-on design and characterization of cutting-edge 2T0C neuron circuits, utilizing state-of-the-art tools and techniques. You’ll collaborate with a dynamic, multidisciplinary team of engineers and researchers, tackling exciting challenges related to device performance and energy optimization.
Your work will involve extensive characterization of BEOL FET devices and circuits. You will have the opportunity to propose, specify and design new memory read architectures, that enables the exploration of multi-level synaptic behaviors toward the implementation of more energy and area efficient next-generation neuromorphic systems.
Join us for this unique opportunity to push the boundaries of technology and be part of a transformative journey that could redefine the future of computing! Your contributions could pave the way for breakthroughs in brain-inspired systems, making a lasting impact on the field.
DCDC converter based on chiplet for HPC applications
High-performance computing (HPC) is becoming more and more critical for the AI
advancement. HPC requires significant amount of power for the needed processing
and struggles with thermal dissipation issues. Recent research highlights the need for
innovative solutions to improve power management for AI processors.
In our research team, you will be responsible for developing an enhanced power
management unit to provide a stable power supply for high-performance processors.
By exploring cutting-edge DC-DC converter topologies and emerging silicon passive
components (inductors and capacitors), the main objective is to design a highly efficient
DC-DC converter that optimizes both power efficiency and density. This project also
involves analyzing power distribution networks and integrated circuit design to optimize
the overall power delivery efficiency with relatively small form factor.
As a PhD student, you will be engaged in various technical tasks, from system-level
analysis to IC design. Working in an IC-design lab, you will collaborate with digital
design and component teams to address both device- and system-level challenges.
Your tasks will be distributed across system architecture (40%), passive component
analysis (20%), and converter design (40%).
Superconducting RF Filters for Quantum Applications
Within the Quantum Devices Laboratory, you will work in an environment ranging from fundamental physics to new nano-electronics technologies, with a team that collaborates closely with quantum computing startups and physicists from CEA-IRIG and Institut Néel.
The operating conditions of qubits (cryogenic temperatures <= 1K, GHz frequencies , high signal density) require the development of suitable components and technological bricks. In particular, the passive radiofrequency components developed around the CEA-LETI superconducting interposer technology show extremely interesting electrical properties up to several GHz. These elements, including inductors available over wide value ranges, have already made it possible to establish the first proofs of concept for very compact and low-loss RF filters. The integration of superconducting materials now makes it possible to envisage the creation of new high-performance filters adapted to signal management in cryogenic environments.
You will be required to develop your expertise in the physics of materials and superconducting components. You will study the different superconducting filters that exist in the scientific literature. Using the models developed in the laboratory and the results of the RF measurements in which you will participate, and relying on 3D RF electromagnetic simulation, you will contribute to the design of different RF filters and functions that meet the needs of cryogenic applications.
3D Hybrid Synapses for Energy-Efficient and Adaptive Edge AI
This PhD thesis is part of the growing field of embedded AI for the Internet of Things (IoT), where constraints in energy, area, and connectivity require rethinking the learning mechanisms of neural networks. The goal is to design neuromorphic architectures based on 3D hybrid synapses combining FeRAM and ReRAM, within an in-memory computing framework. The objective is to enable local adaptation of the model—drawing from machine learning approaches and potentially compatible with plasticity mechanisms such as STDP, VDSP, etc.—while maintaining efficient inference adapted to naturally asynchronous information. The PhD student will develop a heterogeneous memory architecture, design an appropriate local learning protocol, and implement integrated circuit demonstrators. Experimental validation on edge-relevant tasks (e.g., sensory classification) will assess power consumption, network accuracy, and adaptability. Publications and patents are expected outcomes of the thesis.
Study of the stability of Si-CMOS Structures for the implementation of Spin Qubits
Silicon-based spin qubits in CMOS structures stand out for their compatibility with semiconductor technologies and their scalability potential. However, impurities and defects introduced during fabrication lead to noise and instability, which affect their performance.
The objective is to characterize devices fabricated at CEA-Leti, from room temperature to cryogenic temperatures, to evaluate their quality and understand the physical mechanisms responsible for their instability. The goal is to improve the design of the devices and ideally establish a method to identify the most promising devices without requiring measurements at very low temperatures.
The candidate should have skills in the following areas:
- Experimental physics and semiconductors.
- Algorithm programming and data analysis.
- Knowledge in nanofabrication, low-temperature physics, and quantum physics (desirable).
Innovative cooling solutions for 2.5D and 3D electronic systems
As electronic architectures become increasingly complex and dense, managing thermal dissipation is a critical challenge to ensure system reliability and performance. In constrained environments and demanding applications, localized hotspots require innovative cooling solutions compatible with advanced packaging integrations such as 2.5D and 3D. This PhD project is part of this dynamic and aims to explore wafer-level thermal management approaches, relying in particular on advanced 3D integration processes such as direct bonding.
The PhD candidate will contribute to the design and fabrication of test vehicles incorporating temperature sensors and active thermal structures. The main objective will be to assess the efficiency of novel cooling architectures, with a particular focus on integrating microfluidic channels within the stacks, combined with the use of high thermal conductivity materials. The work will include aspects of thermal (and possibly thermo-mechanical) modeling, cleanroom process development, and experimental characterization.
This research topic, at the crossroads of microelectronics and thermal management, offers a stimulating and interdisciplinary framework, closely aligned with emerging industrial needs in advanced packaging.
Physical modelling of Solid-State Batteries exposed to long cycling and fast-charge protocols
CEA-Leti, a leader in the development and manufacturing of integrated solid-state batteries, is collaborating with InjectPower, a cutting-edge start-up, to develop an innovative power solution for miniaturized implantable medical devices. Thin-film all-solid-state battery technology currently stands out as the leading choice for delivering high energy density and customizable form-factor power sources. However, despite this advantage, capacity retention during cycling remains insufficient, with the goal of 1,000 cycles and less than 10% capacity loss still unmet. Additionally, a comprehensive understanding of the physical mechanisms driving performance degradation in microbatteries is lacking.
During this PhD, you will contribute to the development and refinement of our physical model, focusing on accurately describing microbattery behavior during cycling and fast charging. You will also apply our physically informed Bayesian machine learning model to identify key factors that influence battery performance, including charge-discharge protocols, storage conditions, and device architecture. Model training and validation will be based on data collected from automatic probers on silicon wafers containing thousands of microbatteries.
In-situ Monitoring of RF Power Amplifier Circuits Aging for Eco-design and Extended Lifetime
The semiconductor industry, and more specifically the radio-frequency (RF) circuit sector, is facing critical challenges related to eco-design and eco-innovation. These challenges include the need to extend the lifetime of circuits while meeting the growing demands of emerging markets such as 5G and the future 6G. Among these circuits, power amplifiers (PA) play a central role, being both critical components in terms of energy efficiency and key targets for improving robustness against aging and enabling potential reuse.
In this context, in-situ aging monitoring of PAs appears to be a promising approach for developing innovative and sustainable solutions. This research topic is therefore fully aligned with eco-design strategies, leveraging advanced technological platforms such as current and future CMOS SOI technologies, while integrating industrial constraints through existing strategic collaborations with major partners of CEA Leti.
This thesis aims to design an innovative in-situ monitoring solution to evaluate and compensate for the aging of power amplifiers, thereby extending their lifetime through reuse and self-correction strategies. To achieve this, it will rely on methodologies and circuits specifically adapted to practical use cases. The ambition is thus to develop a new generation of robust and durable circuits, integrating intelligent aging management mechanisms. By adopting an eco-design approach, this work aims to address environmental challenges while enhancing the industrial competitiveness of CMOS SOI technologies.