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Thesis
Home   /   Thesis   /   Binarized Neural Network circuit implementation using PCRAM devices for On-Chip Learning

Binarized Neural Network circuit implementation using PCRAM devices for On-Chip Learning

Electronics and microelectronics - Optoelectronics Engineering sciences New computing paradigms, circuits and technologies, incl. quantum Technological challenges

Abstract

PC-RAMs coupled with capacitors have been already proposed to enable on chip learning in classical neural networks trained with the backpropagation algorithm (IBM,Nature) but with an important area overhead.

Recently, a new algorithm that enables on-chip learning in Binary Neural Networks has been proposed. The objective of this thesis is to implement this algorithm on the P28 technology. For this purpose, joint expertises from the technology/device and circuit will be instrumental.

In-depth electrical characterization and modeling will be performed on PCM. Especially, one innovative idea is to exploit the PCM drift for learning. Digital vs. Analog Vector Multiplication approaches will be also benchmarked. These technology inputs will feed extrapolation on Neural Networks. Then, electronic circuits will be designed that implement large scaled binarized neural networks by leveraging the existing PCM P28 technology. Our purpose is t target an electronic chip dedicated to AI where the logic will be performed by automatic place & route.

Laboratory

Département Composants Silicium (LETI)
Service des Composants pour le Calcul et la Connectivité
Laboratoire de Composants Mémoires
Lille I
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