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Thesis
Home   /   Thesis   /   Development of GaN engraving processes and understanding their impact on GaN/dielectric interface properties

Development of GaN engraving processes and understanding their impact on GaN/dielectric interface properties

Condensed matter physics, chemistry & nanosciences Emerging materials and processes for nanotechnologies and microelectronics Solid state physics, surfaces and interfaces Technological challenges

Abstract

The development of the renewable energies and the automotive are requiring more power devices. The use of III-N materials (GaN, AlGaN) has permitted to improve the power device performances. The plasma etching is one of the most critical step in the manufacturing of GaN devices. Indeed, it has been reported that conventional plasma etching can reduce the conduction properties of GaN devices. Thus, new approaches (such as Atomic Layer Etching) have been developed. However, the GaN power transistors is still facing reliability issues, such as threshold voltage (Vth) instabilities. According to the literature, these instabilities would be related to trapping defects inside the dielectric and/or at the interface between the dielectric and the etched-GaN (vacancies, contamination…).

This PhD project of 3 years long aims the development of GaN etching processes in order to improve the dielectric/etched-GaN interface properties and to reduce the threshold voltage instabilities. The developed etching processes should be satisfy the required specifications in terms of profile, etching rate, and plasma damage. One of the main objective will be to understand the etching mechanism involved in the GaN damage, by using the adapted characterizations (C(V), Dit, sheet resistance, XPS, AFM…). New etching strategies and dielectric films will be also evaluated.

Laboratory

Département des Plateformes Technologiques (LETI)
Service des procédés de Patterning
Laboratoire Gravure
Université Grenoble Alpes
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