There is considerable interest in electrically controlling nano-magnets (spintronic) in order to develop non-volatile magnetic memories(MRAM). Indeed, the microelectronics industry is facing major challenges related to the volatility of CMOS cache memory elements(usually SRAM and eDRAM), and MRAMs are among the most credible low power and fast enough candidates to compete withembedded memories (cache level). Most advanced MRAM devices are based on magnetic tunnel junctions (MTJ) that are operated byspin transfer torque (STT) effect for the write, and tunnel magnetoresistance (TMR) effect for the read. Nowadays, commercial productsstart appearing on the market, using STT-MRAM for microcontroller and eFlash replacement.
Meanwhile, spin-orbit torques (SOT) have emerged as a credible next-generation mechanism for MRAM technology that allows forfaster and more efficient magnetization switching, making it is a promising solution for SRAM replacement in cache memory.
SOT-MRAM is now in the phase of R&D industrial developments, and some important roadblocks have recently been overcome, suchas the realization of a deterministic switching without external magnetic field. The typical integration of SOT-MRAM is based on aparticular configuration of the MTJ stack called 'top-pinned': the storage layer is located at the bottom of the MTJ, in contact with theSOT layer. The etching of the MTJ pillar must therefore precisely stop on the SOT metal, which penalizes the manufacturing yield bynano-shorts due to metal re-deposition on the tunnel barrier sidewalls, as well as the density.
Through this PhD project, we propose to study innovative fabrication methods for realizing bottom-pinned SOT-MTJs that wouldimprove manufacturability yield. While fabricating such a device is extremely challenging (there is currently no report or demonstrationof this approach), we have defined various strategies that we believe could overcome this challenge.