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Home   /   Thesis   /   Partitioning of spin Qubits control electronics architecture: co-design of cryoCMOS and room-temperature hardware

Partitioning of spin Qubits control electronics architecture: co-design of cryoCMOS and room-temperature hardware

Electronics and microelectronics - Optoelectronics Engineering sciences New computing paradigms, circuits and technologies, incl. quantum Technological challenges


Quantum algorithms capable of demonstrating a quantum advantage will require the use of quantum processors (QPU) with several thousands of qubits. The design of such a quantum computer is a multidisciplinary challenge at the heart of quantum engineering. Control electronics face particular constraints related to the cryogenic temperature at which qubits operate. Leveraging its expertise in silicon-based technologies, the CEA aims to integrate thousands of semiconductor qubits within a single QPU.

The primary objective of this thesis is to propose an innovative digital and analog qubit control architecture that scales to thousands of spin qubits, by distributing electronics between different stages of the cryostat and the exterior at ambient temperature. The second objective is to create prototypes of this control chain to demonstrate the feasibility and performance of such an architecture.

The work will build upon an existing architecture at ambient temperature and microelectronic blocks developed at cryogenic temperatures within the CEA. New blocks and corresponding circuits will be developed to reach the targetted scale-out quantum architecture. The circuits will be fabricated, tested and measured, and will be published in scientific publications.


Département Systèmes et Circuits Intégrés Numériques (LIST)
Laboratoire Systèmes-sur-puce et Technologies Avancées
Université Grenoble Alpes
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