To increase the performance of quantum computers, three-dimensional (3D) integration is now the key! Using technologies such as flip-chip bonding, multi-layer wiring or even through-silicon vias (TSV), 3D integration offers solutions to increase the number of qubits on a processor, reduce signal loss and cross-talk and even improve thermal management. All of these aspects are essential to continue scaling qubits to achieve fault-tolerant quantum computing.
Our team is developing 3D interconnect technologies (e.g. superconducting microbumps and TSV) for the next generation of quantum processors. This thesis will focus on the electrical and radiofrequency characterization of such interconnects and of the quantum devices integrated nearby to gain knowledge on how these 3D technological bricks may impact the quantum properties.
This position will bring you at the boundary between material, technological and physical challenges of quantum systems. You will work with teams from CEA-LETI and CEA-IRIG. As a PhD candidate, you will take part in the design and layout of test vehicles and in their fabrication. You will also lead the low temperature measurements of the fabricated samples, perform the associated analysis and write reports.