Wide bandgap transistors (GaN, SiC) play a key role in power electronics, but their industrial integration remains hampered by implementation difficulties. The high-side component, within a bridge arm structure, is particularly sensitive to voltage and current transients, which are highly dependent on routing, topology, and switching modes (ZVS, ZCS). Its floating nature makes measurements complex and can disrupt switching during application testing. A methodology adapted to fast transients was developed during a thesis, resulting in a patented test bench for characterizing low-side components. The subject of the postdoctoral research presented here aims to adapt this methodology to high-side components, which are more complex to drive and measure, in order to characterize and model aging due to gate transients under realistic conditions. The test bench will enable the generation of reproducible stress profiles on low-side and high-side components, and the precise measurement of key parameters such as threshold voltage and dynamic instabilities. To achieve these objectives, a new bench will be designed, incorporating specific control and measurement systems, with a view to application testing and targeted aging tests.
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