About us
Espace utilisateur
INSTN offers more than 40 diplomas from operator level to post-graduate degree level. 30% of our students are international students.
Professionnal development
Professionnal development
Find a training course
INSTN delivers off-the-self or tailor-made training courses to support the operational excellence of your talents.
Human capital solutions
At INSTN, we are committed to providing our partners with the best human capital solutions to develop and deliver safe & sustainable projects.
Home   /   Post Doctorat   /   Modeling of trapping and vertical leakage effects in GaN epitaxial substrates on Si

Modeling of trapping and vertical leakage effects in GaN epitaxial substrates on Si

Condensed matter physics, chemistry & nanosciences Electronics and microelectronics - Optoelectronics Engineering sciences Solid state physics, surfaces and interfaces


State of the art: Understanding and modeling vertical leakage currents and trapping effects in GaN substrates on Si are among the crucial subjects of studies aimed at improving the properties of GaN power components : current collapse and Vth instabilities reductions, reduction of the leakage current in the OFF state.
Many universities [Longobardi et al. ISPSD 2017 / Uren et al. IEEE TED 2018 / Lu et al. IEEE TED 2018] and industrials [Moens et al. ISPSD 2017] are trying to model vertical leakages but until now, no clear mechanism has emerged from this work to model them correctly over the entire range of voltage and temperatures targeted. In addition, modeling the effects of traps in the epitaxy is necessary for the establishment of a a robust and predictive TCAD model of device.
For LETI, the strategic interest of such a work is twofold: 1) Understanding and reducing the effects of traps in the epitaxy impacting the functioning of GaN devices on Si (current collapse, Vth instabilities…) 2) Reaching the leakage specifications @ 650V necessary for industrial applications.
The candidate will have to take charge in parallel of the electrical characterizations and the development of TCAD models:
A) Advanced electrical characterizations (I (V), I (t), substrate ramping, C (V)) as a function of temperature and illumination on epitaxial substrates or directly on finite components (HEMT, Diodes, TLM )
B) Establishment of a robust TCAD model integrating the different layers of the epitaxy in order to understand the effects of device instabilities (dynamic Vth, dynamic Ron, BTI)
C) Modeling of vertical conduction in epitaxy with the aim of reducing leakage currents at 650V
Finally, the candidate must be proactive in improving the different parts of the substrate


Département Composants Silicium (LETI)
Service Caractérisation, Conception et Simulation
Laboratoire de Simulation et Modélisation
Top envelopegraduation-hatlicensebookuserusersmap-markercalendar-fullbubblecrossmenuarrow-down